gpu: nvgpu: gv11b: Fix CBC base calculus

On GV11B, CBC base is calculated in similar fashion than it's
calculated on dGPUs. Thus, remove gv11b_ltc_cbc_fix_config() as it
would incorrectly multiply the CBC base by the LTC count.

Bug 2054860

Change-Id: Iaed717161547468c17e12236149d970c497885b3
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1654506
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sami Kiminki
2018-02-08 23:29:41 +02:00
committed by mobile promotions
parent 244a124ce2
commit ff5b12fffd
4 changed files with 0 additions and 15 deletions

View File

@@ -95,7 +95,6 @@ static const struct gpu_ops vgpu_gv11b_ops = {
.init_comptags = vgpu_ltc_init_comptags,
.cbc_ctrl = NULL,
.isr = gv11b_ltc_isr,
.cbc_fix_config = gv11b_ltc_cbc_fix_config,
.flush = gm20b_flush_ltc,
.set_enabled = gp10b_ltc_set_enabled,
},

View File

@@ -236,7 +236,6 @@ static const struct gpu_ops gv11b_ops = {
.init_comptags = gp10b_ltc_init_comptags,
.cbc_ctrl = gp10b_ltc_cbc_ctrl,
.isr = gv11b_ltc_isr,
.cbc_fix_config = gv11b_ltc_cbc_fix_config,
.flush = gm20b_flush_ltc,
.set_enabled = gp10b_ltc_set_enabled,
},

View File

@@ -187,15 +187,3 @@ void gv11b_ltc_isr(struct gk20a *g)
/* fallback to other interrupts */
gp10b_ltc_isr(g);
}
u32 gv11b_ltc_cbc_fix_config(struct gk20a *g, int base)
{
u32 val = gk20a_readl(g, ltc_ltcs_ltss_cbc_num_active_ltcs_r());
if (ltc_ltcs_ltss_cbc_num_active_ltcs__v(val) == 2)
return base * 2;
else if (ltc_ltcs_ltss_cbc_num_active_ltcs__v(val) != 1) {
nvgpu_err(g, "Invalid number of active ltcs: %08x", val);
}
return base;
}

View File

@@ -29,6 +29,5 @@ void gv11b_ltc_set_zbc_stencil_entry(struct gk20a *g,
u32 index);
void gv11b_ltc_init_fs_state(struct gk20a *g);
void gv11b_ltc_isr(struct gk20a *g);
u32 gv11b_ltc_cbc_fix_config(struct gk20a *g, int base);
#endif