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gpu: nvgpu: runlist info mutex not needed for runlist_state

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runlist_info mutex for the runlist being enabled or
disabled in fifo_sched_disable_r is not needed to be
acquired

Bug 2043838

Change-Id: Ia9839ab7effbe7daf353c3a54f25a2b4914af5e8
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1630345
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2018-01-02 14:07:06 -08:00
committed by mobile promotions
parent e7102cf90b
commit ffa5231d2c
3 changed files with 11 additions and 48 deletions
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49
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
View File

@@ -2787,25 +2787,13 @@ static void gk20a_fifo_sched_disable_rw(struct gk20a *g, u32 runlists_mask,
}
void gk20a_fifo_set_runlist_state(struct gk20a *g, u32 runlists_mask,
u32 runlist_state,
int is_runlist_info_mutex_locked)
u32 runlist_state)
{
u32 token = PMU_INVALID_MUTEX_OWNER_ID;
u32 mutex_ret;
u32 runlist_id;
gk20a_dbg_fn("");
if (!is_runlist_info_mutex_locked) {
gk20a_dbg_info("acquire runlist_info mutex");
for (runlist_id = 0; runlist_id < g->fifo.max_runlists;
runlist_id++) {
if (runlists_mask &
fifo_sched_disable_runlist_m(runlist_id))
nvgpu_mutex_acquire(&g->fifo.
runlist_info[runlist_id].mutex);
}
}
nvgpu_log(g, gpu_dbg_info, "runlist mask = 0x%08x state = 0x%08x",
runlists_mask, runlist_state);
mutex_ret = nvgpu_pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
@@ -2813,48 +2801,28 @@ void gk20a_fifo_set_runlist_state(struct gk20a *g, u32 runlists_mask,
if (!mutex_ret)
nvgpu_pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
if (!is_runlist_info_mutex_locked) {
gk20a_dbg_info("release runlist_info mutex");
for (runlist_id = 0; runlist_id < g->fifo.max_runlists;
runlist_id++) {
if (runlists_mask &
fifo_sched_disable_runlist_m(runlist_id))
nvgpu_mutex_release(&g->fifo.
runlist_info[runlist_id].mutex);
}
}
gk20a_dbg_fn("done");
}
void gk20a_fifo_enable_tsg_sched(struct gk20a *g, struct tsg_gk20a *tsg)
{
gk20a_fifo_set_runlist_state(g, fifo_sched_disable_runlist_m(
tsg->runlist_id), RUNLIST_ENABLED,
!RUNLIST_INFO_MUTEX_LOCKED);
tsg->runlist_id), RUNLIST_ENABLED);
}
void gk20a_fifo_disable_tsg_sched(struct gk20a *g, struct tsg_gk20a *tsg)
{
gk20a_fifo_set_runlist_state(g, fifo_sched_disable_runlist_m(
tsg->runlist_id), RUNLIST_DISABLED,
!RUNLIST_INFO_MUTEX_LOCKED);
tsg->runlist_id), RUNLIST_DISABLED);
}
int gk20a_fifo_enable_engine_activity(struct gk20a *g,
struct fifo_engine_info_gk20a *eng_info)
{
gk20a_dbg_fn("");
nvgpu_log(g, gpu_dbg_info, "start");
gk20a_fifo_set_runlist_state(g, fifo_sched_disable_runlist_m(
eng_info->runlist_id), RUNLIST_ENABLED,
!RUNLIST_INFO_MUTEX_LOCKED);
gk20a_dbg_fn("done");
eng_info->runlist_id), RUNLIST_ENABLED);
return 0;
}
@@ -2899,8 +2867,7 @@ int gk20a_fifo_disable_engine_activity(struct gk20a *g,
mutex_ret = nvgpu_pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
gk20a_fifo_set_runlist_state(g, fifo_sched_disable_runlist_m(
eng_info->runlist_id), RUNLIST_DISABLED,
!RUNLIST_INFO_MUTEX_LOCKED);
eng_info->runlist_id), RUNLIST_DISABLED);
/* chid from pbdma status */
pbdma_stat = gk20a_readl(g, fifo_pbdma_status_r(eng_info->pbdma_id));

4
drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
View File

@@ -83,8 +83,6 @@ enum {
#define RUNLIST_DISABLED 0
#define RUNLIST_ENABLED 1
#define RUNLIST_INFO_MUTEX_LOCKED 1
/* generally corresponds to the "pbdma" engine */
struct fifo_runlist_info_gk20a {
@@ -336,7 +334,7 @@ int gk20a_fifo_init_engine_info(struct fifo_gk20a *f);
void gk20a_get_tsg_runlist_entry(struct tsg_gk20a *tsg, u32 *runlist);
void gk20a_get_ch_runlist_entry(struct channel_gk20a *ch, u32 *runlist);
void gk20a_fifo_set_runlist_state(struct gk20a *g, u32 runlists_mask,
u32 runlist_state, int runlist_mutex_state);
u32 runlist_state);
u32 gk20a_fifo_userd_gp_get(struct gk20a *g, struct channel_gk20a *c);
void gk20a_fifo_userd_gp_put(struct gk20a *g, struct channel_gk20a *c);

6
drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
View File

@@ -948,8 +948,7 @@ void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask,
runlists_mask = gv11b_fifo_get_runlists_mask(g, act_eng_bitmask, id,
id_type, rc_type, mmfault);
gk20a_fifo_set_runlist_state(g, runlists_mask, RUNLIST_DISABLED,
!RUNLIST_INFO_MUTEX_LOCKED);
gk20a_fifo_set_runlist_state(g, runlists_mask, RUNLIST_DISABLED);
g->fifo.deferred_reset_pending = false;
@@ -1080,8 +1079,7 @@ void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask,
}
}
gk20a_fifo_set_runlist_state(g, runlists_mask, RUNLIST_ENABLED,
!RUNLIST_INFO_MUTEX_LOCKED);
gk20a_fifo_set_runlist_state(g, runlists_mask, RUNLIST_ENABLED);
/* It is safe to enable ELPG again. */
if (g->support_pmu && g->elpg_enabled)