9948 Commits

Author SHA1 Message Date
Kevin Huang
09f1bebcd5 gpu: nvgpu: fix memory leak in regops ioctl
Bug 200003921

Change-Id: Iebaca62793201ae86ce5f2cf4af3fc870a2aa3a6
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/408415
(cherry picked from commit 7d8fd07a26e33ba53a71dae475dc1074d52767a8)
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/409832
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alka Mohite <amohite@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Tested-by: Deepak Nibade <dnibade@nvidia.com>
2015-03-18 12:09:21 -07:00
Terje Bergstrom
145a9edd3f gpu: nvgpu: Ignore lbreq interrupt
Even though we mask LBREQ interrupt, hardware will still indicate it
in PBDMA interrupt register. Stop treating LBREQ as fatal.

Bug 1498688

Change-Id: Iec4c199437c50951ed9289cb85faf0008646d5c0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/408763
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
2015-03-18 12:09:21 -07:00
Terje Bergstrom
9a6cc07c55 gpu: nvgpu: Do not enable lbreq interrupt
Lbreq interrupt can assert when there is memory back pressure. Do not
enable it as either stalling or nonstalling interrupt.

Bug 1498688

Change-Id: I02f94a64ab9df82402d80a632450d87457644d50
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/408040
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
2015-03-18 12:09:21 -07:00
Terje Bergstrom
3cebc5758a gpu: nvgpu: Fix sched error and recovery race
Fix race between channel recovery and sched error.

Bug 1499214

Change-Id: If95526c7e374703e8941f1b24d3916384261058e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/405662
(cherry picked from commit f8092e158294260dd9d041dc7f4d2c1872e02474)
Reviewed-on: http://git-master/r/407571
Reviewed-by: Automatic_Commit_Validation_User
2015-03-18 12:09:20 -07:00
Terje Bergstrom
c8a5d3f908 gpu: nvgpu: Fix TLB invalidate race
TLB invalidate can have a race if several contexts use the same
address space. One thread starting an invalidate allows another
thread to submit before invalidate is completed.

Bug 1502332

Change-Id: I074ec493eac3b153c5f23d796a1dee1d8db24855
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/407578
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
2015-03-18 12:09:20 -07:00
Terje Bergstrom
4ac110cb8a gpu: nvgpu: Register as subdomain of host1x
Add gk20a as a sub power domain of host1x. This enforces keeping
host1x on when using gk20a.

Bug 200003112

Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/407543
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
2015-03-18 12:09:20 -07:00
Santosh Katvate
4d93f77745 video: tegra: gk20a: Disable gfx before save zbc
This change disables gr engine before calling into pmu
for saving zbc and re-enables once it is finished.
Looks like NV_PPWR_PMU_BAR0_FECS_ERROR_CODE_PRI_TIMEOUT
error during access of NV_PLTCG_LTCS_LTSS_DSTG_ZBC_COLOR_CLEAR_VALUE
happens because of active concurrent memory traffic.

Bug 1489850

Change-Id: I60eacd718480a296f5a46438e18a519c7457f58a
Signed-off-by: Santosh Katvate <skatvate@nvidia.com>
Reviewed-on: http://git-master/r/398398
GVS: Gerrit_Virtual_Submit
(cherry picked from commit 42931088a3a1944359be61ebe39c646b41f73ee6)
Reviewed-on: http://git-master/r/402779
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
2015-03-18 12:09:19 -07:00
Terje Bergstrom
9293a8b319 gpu: nvgpu: Allow sysfs write only to root
Allow write access only to root to gk20a sysfs files.

Bug 200001241

Change-Id: Ibafb84ed703dd32743b520e01a57ffc82f8b4ac4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/405028
(cherry picked from commit dc0f977fe8fcacd260bf61ab658c166b004c1fcd)
Reviewed-on: http://git-master/r/406898
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2015-03-18 12:09:19 -07:00
Shridhar Rasal
c5466deaa1 gpu: nvgpu: disable aggresive syncpoint destroy
Bug 1503225

Change-Id: I52fd660de9bd251ceb936ad4edc34359753a0074
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/399460
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:14 -07:00
Lauri Peltonen
4295256967 gpu: nvgpu: Allow module build
This patch makes the necessary modifications to the gk20a driver to
allow building it as a module.

Bug 1476801

Change-Id: I88c4e1c1867baa1c2d010ac6e0c30bdb5fd63b91
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/380970
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:13 -07:00
Arto Merilainen
ac0d81831a gpu: nvgpu: Define module license
This patch adds missing license definition (GPL v2).

Change-Id: I73d48dffd60eaab9517d09370875d51901853c4e
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/397590
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:13 -07:00
Terje Bergstrom
05579a0036 gpu: nvgpu: Do not enable HCE priv mode
Do not enable HCE priv mode.

Bug 1501689

Change-Id: I3da0ed7c7c1d59ef3e2a8bc727ca531eb22bab11
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/398102
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
2015-03-18 12:09:12 -07:00
Kerwin Wan
875d12c7a0 gpu: nvgpu: gk20a: check the return value of gk20a_channel_busy
gk20a_channel_busy is called to host gpu so that gk20a can be accessed.
But it may return error like if gpu fails to be powered on. Always check
the return value of gk20a_channel_busy to avoid illegal access to gk20a.

Bug 1488409

Change-Id: Ie22da9e436ee5ea711003530419f546a73791b73
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/395180
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:11 -07:00
Deepak Nibade
0389835edb gpu: nvgpu: gk20a: enable syncpt free at channel_unbind()
Set syncpt_aggressive_destroy = true and enable gpu channels'
syncpt free at channel_unbind() time.
This is more agrressive level to free a syncpt.

Bug 1305024

Change-Id: I20296590454fcbf6556c5bd08b7e47156f7a1e65
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/395154
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:10 -07:00
Deepak Nibade
91724953fd gpu: nvgpu: gk20a: allow syncpt free at channel_unbind()
Add infrastructure to allow freeing gpu channels' syncpts at
channel_unbind()

Currently, we free the syncpt at channel_free() only.
But we can free the syncpt when channel becomes idle.

When we do channel_unbind(), channel cannot be scheduled and
hence we can destroy its syncpt.
Channel will request again for new syncpt when it has new work
to do.

This feature will be enabled with boolean flag
syncpt_aggressive_destroy

Bug 1305024

Change-Id: Ib498e2c371e36ffc1430d4f95f2780b4c587e43e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/395153
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:10 -07:00
Arto Merilainen
53622e8931 gpu: nvgpu: Power on platform deps for wfi
Currently gk20a_channel_idle() drops pm_runtime references to gk20a
and then drops platform dependencies. As we usually delay powering down
gk20a, we may end up to case where the platform dependencies are
turned off at the moment we start powering down gk20a. Power off
sequence may use platform dependencies for informing completion of
the last work, wait-for-idle, and therefore we may simply drop the
information about job completion.

This patch adds missing calls to power up platform dependencies for
the time we submit the last work.

Bug 1484824

Change-Id: I058febc717a1cb1cf96964ce20fb807bc876be6c
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/396286
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Tested-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:09 -07:00
Terje Bergstrom
5515f947a3 gpu: nvgpu: Request irq at probe
Request irq at probe instead of at poweron. This allows investigating
interrupt numbers across rail gating cycles.

Change-Id: I6db4b3f1d865c6fbbd9d6a96c3df89617e169891
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/374859
2015-03-18 12:09:08 -07:00
Arto Merilainen
b4f4eca2bb gpu: nvgpu: Disable IRQs after channel suspend
Interrupts may be needed before we have actually silenced all
channels. Few possible scenarios include channel recovery during
teardown and sw method before the channels have been suspended.
This patch modifies the teardown path so that we disable interrupts
after the channels have been suspended.

Change-Id: Ifc36dbb74b1d36bd88d1220fa50a53c4072df4d8
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/394599
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:08 -07:00
Terje Bergstrom
8323c0a015 gpu: nvgpu: Do not dump top_fs_status
Result of top_fs_status_r() is always constant. Do not dump it
anymore.

Change-Id: Ie1cfe872d70b2c3c8a7cef4df3870dacae8f8793
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/395208
2015-03-18 12:09:06 -07:00
Prashant Gaikwad
de8c0e2605 platform: tegra: move pm_domain to drivers
Change-Id: I30baee4084399b8078232f31296c4d891a903d47
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/395123
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2015-03-18 12:09:06 -07:00
Terje Bergstrom
3df84a13d1 gpu: nvgpu: Make trigger mmu fault GPU specific
Add abstraction for triggering fake MMU fault, and a gk20a
implementation. Also adds recovery to FE hardware warning
exception to make testing easier.

Bug 1495967

Change-Id: I6703cff37900a4c4592023423f9c0b31a8928db2
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:06 -07:00
Arto Merilainen
542f729aa9 gpu: nvgpu: Allow mapping backing store
Backing store sgt needs to be mapped to gpuva to enable CDE swizzling.
This patch adds necessary code to create sgt during initialisation so
that the sgt is available when needed.

Bug 1409151

Change-Id: I9d4671386fe9204d780c2e286b5f9b2dd87af35a
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
2015-03-18 12:09:05 -07:00
Arto Merilainen
d4586cc3ab gpu: nvgpu: Alloc physical mem for CBC in sim
CBC frontdoor access works incorrectly in the simulator if CBC
is allocated from IOVA. This patch makes CBC allocation to happen
from physical memory if are running in simulator.

Bug 1409151

Change-Id: Ia1d1ca35b5a0375f4707824df3ef06ad1b9117d4
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
2015-03-18 12:09:05 -07:00
Arto Merilainen
3eedb0256d gpu: nvgpu: Invalidate CBC in initialization
Ensure CBC is invalidated at GPU initialization.

Bug 1409151

Change-Id: I054be20a3252e40c96baec75958918c85a5a7801
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
2015-03-18 12:09:05 -07:00
Arto Merilainen
38de7b6475 gpu: nvgpu: Add CBC clean and invalidate
Bug 1409151

Change-Id: I232af159d402f818cf972498d721c3b57846ce74
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
2015-03-18 12:09:05 -07:00
Arto Merilainen
2c615d68b8 gpu: nvgpu: Fall-back to 4k pages
This patch modifies the code to fall-back to 4k pages if the current
VA does not support 128k pages.

Bug 1409151

Change-Id: I94e9ca5953740388db689bc9306b0392191e29d2
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
2015-03-18 12:09:05 -07:00
Arto Merilainen
177e4e4735 gpu: nvgpu: Store gpu config
This patch adds necessary code to store the gpu configuration into
gr structure.

Bug 1409151

Change-Id: I045b21ebdc849833380a3d953d951f8352842ac7
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
2015-03-18 12:09:05 -07:00
Deepak Nibade
ba03fd69dd gpu: nvgpu: gk20a: fix syncpt waiting debug print
debug print "Waiting on syncpt" for gpu channel prints that
channel is waiting for the syncpt without checking the state
of the channel

hence modify this print as follows :

if channel is in "pending acquire" or "on_eng_pending_acquire"
state we print "Waiting on syncpt"
otherwise we print "Waited on syncpt"

Bug 1305024

Change-Id: Ie22db689d6e8016c63158e8961d2233042069bec
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/394715
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:04 -07:00
Prashant Malani
8bef793145 gpu: nvgpu: gk20a: Enable railgating
Bug 1494200
Bug 1492505

Change-Id: I77bbe4f775780e80de1b8f9279be82926f3ed7c9
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/393738
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>
2015-03-18 12:09:03 -07:00
Prashant Malani
bc563de0bf gpu: nvgpu: gk20a: disable devfreq before gk20a
Ensure devfreq is disabled before shutting down gk20a, to prevent
possible races with reading of gpu load, and the shutdown of gpu itself.

Bug 1492913

Change-Id: I016fdba9515120fc6cf3e771f60c61b9bf2027cb
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/394296
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:02 -07:00
Shridhar Rasal
b210a775cf gpu: nvgpu: gk20a: fix genpd name
domain name should be different from device name.

Change-Id: I6c7d6927d6fc5bada203d749f107c17043233501
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/392327
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:02 -07:00
Lauri Peltonen
9c5d336fb7 gpu: nvgpu: Don't request host1x irq on channel wfi
Fix regression caused by commit 67fa249b419d32bfd0873fe5d924f4f01d9048de
"video: tegra: host: Abstract gk20a channel synchronization".

The above change unintentionally modified the channel synchronization
logic so that an nvhost interrupt handler was scheduled also when idling
the channel in gk20a_channel_submit_wfi. That appears to cause
intermittent hangs when running CUDA tests.

Bug 1484824

Change-Id: I4a1f85dd9e6215350f93710a2be9b0bbaef24b8f
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/394127
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:01 -07:00
Prashant Malani
9727cf87bc video: tegra: host: gk20a: reorder free_irq
Free IRQs before the various subunits are suspended. This is to prevent
potential races between the IRQ thread and the suspend routine.

Bug 1437749

Change-Id: Iffef918feecae0b256be96efd02b01b2677c225d
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:01 -07:00
Arto Merilainen
ef4ed26f8b gpu: nvgpu: Remove redundant locked variable
Queue locked variable holds entirely redundant information about the
queue status and having the variable causes a race between lock() and
unlock() functions. This patch removes the locked variable.

Bug 1495617

Change-Id: I05682bfe7a23acc77c2bfe405938ace7d2b3d081
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/393431
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:01 -07:00
Arto Merilainen
c38dae5b52 gpu: nvgpu: Export pde coverage
This patch adds a field to the gpu capability ioctl to allow
requesting the maximum VA a single PDE entry can hold.

Bug 1456570

Change-Id: I5cf29c8816fa6ea396c36419e6821c27a805b8af
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
2015-03-18 12:09:00 -07:00
Deepak Nibade
fa6f7f882d gpu: nvgpu: gk20a: remove code duplication
Bug 1443071

Change-Id: I225114835a5923061462e238395798b274cadd7b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2015-03-18 12:09:00 -07:00
Deepak Nibade
f5fe93456f gpu: nvgpu: gk20a: add syncpt id checks
add valid syncpt id checks when syncpt id is
extracted from fence fd

Bug 1448825

Change-Id: I0f1722aad60e7644b8f490f24cf18a3b80f8583c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/390572
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:00 -07:00
Deepak Nibade
65c230fc83 gpu: nvgpu: gk20a: always map ptes for 64 bit arch
On 64 bit architecture, we have plenty of vmalloc space
so that we can keep all the ptes mapped always
But on 32 but architecture, vmalloc space is limited and
hence we have to map/unmap ptes when required

Hence add new APIs for arch64 and call them if
IS_ENABLED(CONFIG_ARM64) is true

Bug 1443071

Change-Id: I091d1d6a3883a1b158c5c88baeeff1882ea1fc8b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/387642
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:59 -07:00
Kevin Huang
ea76deaa6a video: tegra: host: fix the bundle corruption
Wait for FE idle between SW bundles.

Bug 1477234
Bug 1486347
Bug 1485069

Change-Id: I5181b1240fff73cfecd07aa3e54076cde800ea00
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/391591
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:59 -07:00
Prashant Malani
bde3d332f9 video: tegra: host: gk20a: reorder init save zbc
During the ELPG initialization routine, ELPG should be explicitly
disabled before we save the zbc table. This ensures that even if there
is a preemption from some other thread that calls ELPG enable/disable,
the ref counting will ensure that ELPG remains disabled.

Bug 1490085

Change-Id: Ie8eeaf48dda4e7f810aa26926facf63753e86abe
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/382273
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
2015-03-18 12:08:58 -07:00
Kerwin Wan
efad6452f6 gpu: nvgpu: handle error when gpu failed to unpowergate
After flash, kernel needs to reboot after first boot.
During reboot, devices is going to be shutdown including i2c.
But sometimes gpu driver trys to open gpu sysfs nodes and
unpowergate gpu at the same time. But i2c is already shutdown.
tegra_unpowergate_partition returns error in this case but
gk20a_tegra_unrailgate did not report the error so the error
is not handled. Return proper value in gk20a_tegra_unrailgate
to avoid this.

Bug 1488409

Change-Id: I3470ad44a0047ae9b06f5907162ccf51795a5e04
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/390688
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:57 -07:00
Deepak Nibade
f3f9677c57 gpu: nvgpu: gk20a: fix syncpt names for gk20a
nvhost_get_syncpt_host_managed() creates syncpt name based on
platform_device pointer passed to it
Passing host1x's pointer to this API results in setting gk20a
syncpt names as "host1x_0" which is conflicting

Hence to restore this pass gk20a's device pointer
which gives syncpt names as "gk20a.0_0"

Bug 1305024

Change-Id: I40325f2e4e2d9ea8de1d44e136edcb48a431e45c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/389671
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:56 -07:00
Terje Bergstrom
0d908e51c8 gpu: nvgpu: Check bar1 bind
Add two fb flushes after bar1 bind. This should hang the thread instead
of whole system in case there is a BAR1 hang.

Change-Id: I2385a243711219297b889daa30c9fc81106e5825
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/390183
2015-03-18 12:08:55 -07:00
Terje Bergstrom
4a8f0db379 gpu: nvgpu: gk20a: Fix G_ELPG flush poll
We poll completion of flush sequence by polling the broadcast
register. The polling should be done for a per-slice register
instead.

Bug 1457723

Change-Id: I10aba939175b6d05b05f5f26eebebcbe09d9b4a7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/382521
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
2015-03-18 12:08:54 -07:00
Kevin Huang
b5acc421ee video: tegra: host: flexible to select fw per chip
Decouple the firmware selection of different gpu architecture.

Change-Id: I62bf6b3bc51a8606c5973e475988cd5987a65a1a
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/389793
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:54 -07:00
Arto Merilainen
a9785995d5 gpu: nvgpu: Add NVIDIA GPU Driver
This patch moves the NVIDIA GPU driver to a new location.

Bug 1482562

Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/383722
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:53 -07:00
Lauri Peltonen
61efaf843c video: tegra: host: Abstract gk20a channel synchronization
Move all channel synchronization code to new channel_sync_gk20a.c/h
files, and access all synchronization functions through function
pointers. This is groundwork for supporting semaphore based channel
synchronization.

Bug 1434573
Bug 1450122

Change-Id: Ic21709c1ee8cf85d018616787988e7eebb399fbe
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/374841
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:22 -07:00
Arto Merilainen
dd5e0b3da0 video: tegra: host: gk20a: Add own trace events
This patch modifies gk20a driver to use its own trace events instead
of trace events of nvhost.

Bug 1468086

Change-Id: I1f40ba957ec7e25904e9f4621346cb7dc256a550
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/374289
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:21 -07:00