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4d93f77745
This change disables gr engine before calling into pmu for saving zbc and re-enables once it is finished. Looks like NV_PPWR_PMU_BAR0_FECS_ERROR_CODE_PRI_TIMEOUT error during access of NV_PLTCG_LTCS_LTSS_DSTG_ZBC_COLOR_CLEAR_VALUE happens because of active concurrent memory traffic. Bug 1489850 Change-Id: I60eacd718480a296f5a46438e18a519c7457f58a Signed-off-by: Santosh Katvate <skatvate@nvidia.com> Reviewed-on: http://git-master/r/398398 GVS: Gerrit_Virtual_Submit (cherry picked from commit 42931088a3a1944359be61ebe39c646b41f73ee6) Reviewed-on: http://git-master/r/402779 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mitch Luban <mluban@nvidia.com>