CERT-C Rule INT30 requires checking unsigned arithmetic for potential
wrap. The macros roundup_pow_of_two and rounddown_pow_of_two could
potentially wrap if the passed parameter were 0.
JIRA NVGPU-3586
Change-Id: I9eba4c197b74db555055e1199ce72131b071062c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131157
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Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
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Updated test to cover test where:
- update runlist fails during unbind
- tsg is aborted
- updated runlist fails during abort
Modified update runlist stub to return -EINVAL depending
on branch combinations.
Added custom pruning function to skip some impossible
combinations of non-final branches.
Jira NVGPU-3476
Change-Id: I23a64085239b4003b73873a984a301476d73d962
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124513
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Restricted the os specific channel open only for kernel mode submit.
For linux, g->os_channel.open is just noop.
For QNX, nvgpu creates the sync point notifier thread for
job tracking. This job completion tracking is only required
for kernel mode submit. This sync point notifier thread
is not required for user mode submit.
JIRA NVGPU-2944
Change-Id: Ie37824aac3609090ef9da378202dbc211a2eb0b3
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131386
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Move the PTE size computation from MM to VM where it belongs. This
function is only ever used in vm.c so move it there and make it
static.
This is part of the broader effort to cleanup the top level unit
header files and only expose functions needed by other units in the
top level unit header files.
JIRA NVGPU-3544
Change-Id: Ifd8ed36723eb62e19a7e6563ef52dc9c3adb3f52
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128075
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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Do not ignore volatile attribute of addr while assigning it to p.
Error: CERT EXP32-C:
drivers/gpu/nvgpu/os/posix/bitmap.c:227:
cert_violation: Access volatile variable "addr" through
a nonvolatile reference.
Jira NVGPU-3560
Change-Id: I202b143e1818641b12f6552810953ac447348271
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2122720
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-compile out nvgpu_pmu members which are not required for
safety buid & modified source as required to support same.
-compile out PMU headers include which are not required for
safety code
-Removed unnecessary PMU header includes from some files
JIRA NVGPU-3418
Change-Id: I5364b1b16c46637d229e82745dd2846cb6335a72
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128228
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Add an assert check to ilog2() before subtracting to avoid CERT-C INT30
violation. Rule INT30 requires checking for overflow of signed values.
JIRA NVGPU-3563
Change-Id: Ieff968e6245e61150396746d78d69558f22338af
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128587
Reviewed-by: Automatic_Commit_Validation_User
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Initially, EXPECT_BUG was implemented with a if (!setjmp) which was
semantically incorrect for the setjmp construct and caused a MISRA
violation. Upon fixing the MISRA violation, it was changed to
if (setjmp != 0) which fixed the MISRA violation but made the test
code to never actually run because setjmp will first return 0 during
the init of the jump point. This caused EXPECT_BUG to always return
true as if a BUG() occurred.
In addition, setjmp is relying internally on CPU registers. As a
result, local variables may get clobbered. This mainly happens when
compiler optimizations are enabled (release builds) and the compiler
relies more on registers to hold local variables. In the case of the
EXPECT_BUG statement expression, the variable holding the return value
was incorrectly getting clobbered in some corner cases leading to
false negatives. The easy workaround for this is to declare it as
volatile, which prevents the compiler from only relying on registers
for this variable.
JIRA NVGPU-3562
Change-Id: Ie5e262d630bdd38b22449347a396d4c2cdd3bbe2
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126872
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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A separate bug caused EXPECT_BUG to always return true without actually
calling the corresponding test code. This hid some issues in the buddy
allocator unit where the fini() operation was called several times while
expecting it to call BUG(). Doing so caused the mutex unlock operation to
not be called, which caused a deadlock for all subsequent calls. The fix
is to explicitly release the mutex after each call to fini() that expects
a BUG().
JIRA NVGPU-3562
Change-Id: Ic26058a272c616d2a6052d319f38a4d4dc33ef1c
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126874
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Make the nvgpu_init_mutex function return void.
In linux case, this doesn't affect anything since mutex_init
returns void.
For posix, we assert() and die if pthread_mutex_init fails.
This alleviates the need to error inject for _every_
nvgpu_mutex_init function in the driver.
Jira NVGPU-3476
Change-Id: Ibc801116dc82cdfcedcba2c352785f2640b7d54f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130538
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Unit tests in page_table were initializing the VM with a kernel_reserved
section that was slightly smaller than expected. Then, when the fixed
alloc to support semaphores was done, the fixed address used was actually
below the start of the kernel address space. As a result this caused an
overflow in the base shift in the buddy allocator responsible for
managing the fixed alloc.
Change-Id: I4e688d418262ac8d9d4b66b46bd32ca5456d95e8
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130433
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Tested-by: Philip Elcan <pelcan@nvidia.com>
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The patch adds missing parentheses for macros used in SDL. It is required to
address the following misra violation: MISRA C-2012 Rule 20.7 - Macro parameter
expands into an expression without being wrapped by parentheses.
JIRA NVGPU-3180
Change-Id: I70d5359652c6e29814fe17e356dcd5553b498b34
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130260
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
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The vm object num_user_mapped_buffers was declared as an int. However,
it is an unsigned value. Being a signed value required a cast to
unsigned when calling nvgpu_big_zalloc() which causes a CERT-C INT31
violation. So, avoid the cast and use an unsigned type. And fix related
INT30 violations related to num_user_mapped_buffers as well.
To avoid introducing new MISRA/CERT-C violations, update the upstream
user of these changes, fifo/channel.c and make the equivalent uses of
this value, num_mapped_buffers a u32 as well.
JIRA NVGPU-3517
Change-Id: I6f6d9dfe4a0ee16789b8cd17b908a3f3f9c4a40c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127427
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Rule INT31 requires integer conversions do not result in losing or
misinterpreting data. For most cases, use the safe cast operations.
For one case, the conditional operator was being used for s16 values
which were being promoted to ints. So, replace the conditional operator
with an if statement.
JIRA NVGPU-3517
Change-Id: Iac466911b0dd3893e7e7a188e372272b14591b60
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127425
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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- Fix Rule 16.1 and 16.6 violations:
Every switch statement shall have at least two
switch-clauses
- Fix Rule 15.6 violations:
The body of an iteration statement shall be a
compound statement.
- Fix Rule 17.7 violations:
The return value of a non-void function shall
be used.
JIRA NVGPU-3546
Change-Id: I475d185945f0998d4d359f4b9ded6e983474f01f
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127923
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Function for copying to/form IMEM/DMEM cast pointer to char to
pointer to u32 since falcon data registers are read/written in
4-bytes. Firmware data is generally byte stream and hence we
won't be able to deal in pointer to u32. Hence we need deviate
from misra rule 11.3.
Firmware data is also not aligned at word boundary sometimes
hence we need to copy it byte by byte to conform to the dev-
iation recommendation.
Error: MISRA C-2012 Rule 11.3: ./hal/falcon/falcon_gk20a.c:296:
misra_violation: The object pointer expression "src" of type
"u8 *" is cast to type "u32 *".
JIRA NVGPU-3271
Change-Id: Ic081f97226dbbcf08402970829624933402066eb
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108547
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