Mahantesh Kumbar
0a64f6cb2d
gpu: nvgpu: PMU pmu.c/h header include cleanup
...
Some headers are not required to include in pmu.c/h as
lot of PMU code restructure happened, so removed headers
which not required anymore.
JIRA NVGPU-1972
Change-Id: Iead7f049d167cdaaaf7c75c2a5e19ae7b068fe6b
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2110108
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com >
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com >
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com >
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2019-05-23 00:56:45 -07:00
Debarshi Dutta
4c30bd599f
gpu: nvgpu: rename tsg_gk20a*/gk20a_tsg* functions.
...
rename the functions with the prefixes tsg_gk20a*/gk20a_tsg*
to nvgpu_tsg_*
Jira NVGPU-3248
Change-Id: I9f5f601040d994cd7798fe76813cc86c8df126dc
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2120165
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2019-05-17 01:49:27 -07:00
Seema Khowala
42c2ea552d
gpu: nvgpu: fifo MISRA fix for Rule 10.1
...
JIRA NVGPU-3383
Change-Id: I18ab3ebd4728ff798c0cc47f6cb84d1dda225b53
Signed-off-by: Seema Khowala <seemaj@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2116729
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com >
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2019-05-13 14:10:37 -07:00
Debarshi Dutta
17486ec1f6
gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
...
rename struct tsg_gk20a to struct nvgpu_tsg and rename struct
channel_gk20a to struct nvgpu_channel
Jira NVGPU-3248
Change-Id: I2a227347d249f9eea59223d82f09eae23dfc1306
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2112424
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com >
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2019-05-06 02:56:53 -07:00
Seema Khowala
cfb4ff0bfb
gpu: nvgpu: rename struct fifo_gk20a
...
Rename
struct fifo_gk20a -> nvgpu_fifo
JIRA NVGPU-2012
Change-Id: Ifb5854592c88894ecd830da092ada27c7f05380d
Signed-off-by: Seema Khowala <seemaj@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2109625
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com >
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com >
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2019-05-03 16:25:43 -07:00
Seema Khowala
39070c653f
gpu: nvgpu: move FIFO_INVAL_* out of fifo_gk20a.h
...
Move and rename
FIFO_INVAL_ENGINE_ID -> NVGPU_INVALID_ENG_ID
FIFO_INVAL_TSG_ID -> NVGPU_INVALID_TSG_ID
FIFO_INVAL_RUNLIST_ID -> NVGPU_INVALID_RUNLIST_ID
FIFO_INVAL_SYNCPT_ID -> NVGPU_INVALID_SYNCPT_ID
FIFO_INVAL_CHANNEL_ID -> NVGPU_INVALID_CHANNEL_ID
JIRA NVGPU-2012
Change-Id: Ic4cc16ece64d85e22f16e4d28dcfd0c187bb65f3
Signed-off-by: Seema Khowala <seemaj@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2109011
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2019-05-02 23:40:26 -07:00
Seema Khowala
3392a72d1a
gpu: nvgpu: move runlist related struct and defines
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Move from fifo_gk20a.h to runlist.h
RUNLIST_DISABLED
RUNLIST_ENABLED
MAX_RUNLIST_BUFFERS
struct fifo_runlist_info_gk20a
Rename
fifo_runlist_info_gk20a -> nvgpu_runlist_info
JIRA NVGPU-2012
Change-Id: Ib7e3c9fbf77ac57f25e73be8ea64c45d4c3155ff
Signed-off-by: Seema Khowala <seemaj@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2109008
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2019-05-02 23:39:42 -07:00
Seema Khowala
df831c200b
gpu: nvgpu: rename enable/disable sched
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Rename
gk20a_tsg_enable_sched -> nvgpu_tsg_enable_sched
gk20a_tsg_disable_sched -> nvgpu_tsg_disable_sched
JIRA NVGPU-3144
Change-Id: I569025ea96e64b2bf3f8216a6080a8496570acf3
Signed-off-by: Seema Khowala <seemaj@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2101277
Reviewed-by: Thomas Fleury <tfleury@nvidia.com >
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com >
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com >
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com >
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2019-04-22 15:25:38 -07:00
Seema Khowala
bdfc26af8b
gpu: nvgpu: move preempt code to common/fifo and hal/fifo
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Move chip specific preempt code to hal/fifo
Move non-chip specific preempt code to common/fifo
Remove fifo.get_preempt_timeout
Rename gk20a_fifo_get_preempt_timeout -> nvgpu_preempt_get_timeout
Rename gk20a_fifo_preempt -> nvgpu_preempt_channel
Add fifo.preempt_trigger hal for issuing preempt
Add fifo.preempt_runlists_for_rc hal for preempting runlists during rc
Add fifo.preempt_poll_pbdma hal
Add nvgpu_preempt_poll_tsg_on_pbdma to be called from rc
JIRA NVGPU-3144
Change-Id: Idb089acaa0c6ca08de17487c3496459a61f0bcd4
Signed-off-by: Seema Khowala <seemaj@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2100819
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2019-04-22 15:25:29 -07:00
