Commit Graph

741 Commits

Author SHA1 Message Date
Konsta Hölttä
dd2fb50a1a gpu: nvgpu: require deferred cleanup for aggressive sync destroy
Aggressive sync destroy is used on some platforms where the amount of
syncpoints is limited. It can cause sync objects to get allocated and
freed in the submit path and when jobs are cleaned up, so require
deferred cleanup. Allocations do not belong to job tracking in a
deterministic submit path.

Although this has been technically allowed before, deterministic
channels have likely not been a priority on those old platforms with
aggressive sync destroy set.

Update virtualized gp10b platform data to match on a gp10b-vgpu compat
string instead of gk20a-vgpu. gk20a (Tegra T124) hasn't been supported
for a long time. Delete the aggressive sync destroy field from this
platform. It's got enough syncpoints to not dynamically allocate them;
having this property set for gp10b-vgpu has likely been a mistake.

This is not a completely pure cherry-pick: also extend the gpu
characteristics to not advertise full deterministic submit support when
aggressive sync destroy is off. This platform flag cannot be adjusted by
the user unlike many other flags.

Jira NVGPU-4548

Change-Id: I283f546d48b79ac94b943d88e5dce55710858330
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2322042
(cherry picked from commit b1ba2b997b2174e365bcb0782ef3e67260ff9e57)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2328411
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2020-12-15 14:13:28 -06:00
Konsta Hölttä
2001b8ec97 gpu: nvgpu: remove aggressive sync init from platform
Remove the boolean aggressive_sync_destroy flag from struct
gk20a_platform; only the threshold to set the channel limit is useful in
the platform data. The boolean flag is a runtime condition and it always
starts as false.

Jira NVGPU-4548

Change-Id: I1a4b9903978ab239581857ff791a7983f59fdc13
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2331357
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2020-12-15 14:13:28 -06:00
Dinesh
1c1da3d6b4 gpu: nvgpu: Syncpoint invalid value to ~0.
As qnx syncpoint's invalid value is ~0, change the code
to handle this.

Bug 200603716

Change-Id: I5ec79688cd9e60066725781f1effe57692ec0c27
Signed-off-by: Dinesh <dt@nvidia.com>
(cherry picked from commit 705260565a75bc90683841c4c08e4c857bda39f0)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2331208
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2020-12-15 14:13:28 -06:00
Debarshi Dutta
c1521a7bba gpu: nvgpu: change system suspend's implementation
Currently, for platforms with canRailgate device characteristics disabled,
suspend can block as deterministic channels hold busy references. This
patch makes the change to first hold off any new jobs for deterministic
channels and then reverts back the busy references taken by those
channels. Following this, suspend also waits for the device to get idle
by waiting (with timeout) for the nvgpu's internal usage counter to be
come zero. This ensures there are no further jobs in progress and
allows the system to go into a suspend state.

Bug 200598228
Bug 2930266

Change-Id: Id02b4d41a9c2dd64303b2e2449dbed48c12aea4c
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2328489
(cherry picked from commit 9d1e07ca18)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2330159
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2020-12-15 14:13:28 -06:00
Sagar Kamble
72d01afd0c gpu: nvgpu: replace dma_buf_kmap with dma_buf_vmap
dma_buf_kmap was introduced a decade ago to map a dma_buf partially
by the input number of pages, when 32-bit was fairly common. It was
added to not exhaust vmalloc space. Starting from kernel 5.6, it is
deprecated as vmap calls should succeed with larger available
vmalloc space.

Use dma_buf_vmap/vunmap instead of dma_buf_kmap/kunmap for handling
mapping of notifier memory in gk20a_channel_wait_semaphore.

Also update the debug prints and add speculation barrier to the
start of gk20a_channel_wait.

Bug 2925664

Change-Id: I49078fa81f050a57a5b66a793e62006dd66e3ba3
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2326513
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2020-12-15 14:13:28 -06:00
Abdul Salam
b029f3b2b0 gpu: nvgpu: Reactor clk_fll unit
As a part of refactor move struct nvgpu_avfsfllobjs from public header
to private header.
This will help to have arch consistency across all units.
Use public functions to fetch the data across other units.

NVGPU-4690

Change-Id: I73a750695c2ae7d3e46d1d692d10e40f13ec3cb3
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/#/c/linux-nvgpu/+/2326675/
(cherry picked from commit 41e374461da5dc9e2b4ac67a0855fd8dd20e1450)
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2020-12-15 14:13:28 -06:00
Sagar Kamble
81b14ef5b1 gpu: nvgpu: fix dbg log and comment in nvgpu_vm_find_mapping
Following commit updated the debug message in the function
nvgpu_vm_find_mapping w.r.t reuse of mapping.

  commit 2f00d9adfc4fc91a6b84b14cc513f9b855d39cad
  Author: Sagar Kamble <skamble@nvidia.com>
  gpu: nvgpu: fix null pointer access in nvgpu_vm_find_mapping

That reuse log is about the mapping and not SGT. Fix the log
and add details about different handling of SGT for dmabuf
drvdata cases in the comment.

Bug 2834141

Change-Id: I3630de1c45a2bf55ff18bdb426f0597efe83f72c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2328427
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2020-12-15 14:13:28 -06:00
Konsta Hölttä
1dcd4957f0 gpu: nvgpu: extract job from channel.c
Start moving job and job list related functionality out of the big
channel.c file. The lowest level job list stuff is moved, as is resource
preallocation which is tied to the job list. Adding and cleaning jobs
still stays in channel.c for now.

The joblist is still owned by the channel as a direct struct field.

Jira NVGPU-4548

Change-Id: I2733484d8ce6bd7b1fe0c32a867139c682616dfd
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2323149
(cherry picked from commit cbd20803ee10058da9d258e9e8cb91b34d2278d5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2328408
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2020-12-15 14:13:28 -06:00
Nitin Kumbhar
85949d39e2 gpu: nvgpu: disable GC-OFF feature for all dGPUs
Set the can_pci_gc_off platform flag of all dGPUs to false
to disable powering on/off dGPU using GC-OFF feature.

Bug 2917054

Change-Id: Iffacd134cf52a137bb9c121d69bd0fd0a096c6ff
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2327968
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2020-12-15 14:13:28 -06:00
Sagar Kamble
23d545f250 gpu: nvgpu: dma_buf_ops map unavailable in upstream
This function op is deprecated after kernel version 5.5. Compile the
corresponding code under version check.

Bug 2925664

Change-Id: Ice1b02a3d6c7942ec63a609c515436d2622c3575
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2326512
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2020-12-15 14:13:28 -06:00
Sagar Kamble
705dd2ad77 gpu: nvgpu: use timespec64
Due to y2038 problem, where timestamps will overflow if logged in 32bit
values, upstream linux kernel has removed timespec and friends.

Correpsonding jiffies conversion functions are also obsolete. Update
the notifier timestamp setup code to comply with this.

Bug 2925664

Change-Id: I5266e3d748e536175af8eff5111fcc54556332a8
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2326514
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2020-12-15 14:13:28 -06:00
Konsta Hölttä
0119aedbe5 gpu: nvgpu: try syncpt fdget only if supported
Guard nvgpu_os_fence_syncpt_fdget() with an nvgpu_has_syncpoints()
check. Even when CONFIG_TEGRA_GK20A_NVHOST is set, the platform data bit
can be disabled independently; on Linux we have a runtime flag to
disable them, too. If nvgpu doesn't have syncpt support, don't try
reading syncpt-based sync files.

If a sema-only-backed channel sync is given a syncpoint-based prefence
fd, we can't wait for it with the current design that couples waits and
increments in one interface. This should eventually be fixed, but for
now the extra check at least guards another interesting case.

A sync file with a zero fence count can be trivially accepted as either
a valid syncpoint fence or a sema fence. If only semas are supported,
and the syncpt check that happens first would turn the empty fd into a
syncpt-based sync fence, the sema wait layer would wrongly reject it.

Jira NVGPU-4548

Change-Id: Ib40c2d9a6a25812c5e24eef52c1d1a4f81eeed83
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2325733
(cherry picked from commit 877f99d7c9977dfea14480a1b0488c990b813d1d)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2326044
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2020-12-15 14:13:28 -06:00
Konsta Hölttä
32fae6acf4 gpu: nvgpu: linux: read current syncpt in set safe state
nvhost_syncpt_read_minval() only reads the min value that nvhost has
cached. It makes sense for host managed syncpoints, but the user
syncpoint that needs set_safe_state is client managed; its min and max
values are not tracked internally. Use nvhost_syncpt_read_ext_check() to
read the actual syncpoint value from HW and set the "safe state" (65536
increments) based on that.

The safe state is analogous to "set min equal to max" when max is
expected to be no more than the current value plus a big number. Using
the cached min value would make this safe state lose its meaning when
there could have been more than the big number of increments since the
syncpoint was allocated.

Jira NVGPU-4548

Change-Id: I395be75f1696e48e344f5503420864efeb3621de
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2323060
(cherry picked from commit ae571178ca63c4fa3e6bf70a4da0221393e975ee)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2326380
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2020-12-15 14:13:28 -06:00
Konsta Hölttä
4f80c6b8a9 gpu: nvgpu: add channel_user_syncpt
Refactor user managed syncpoints out of the channel sync infrastructure
that deals with jobs submitted via the kernel api. The user syncpt only
needs to expose the id and gpu address of the reserved syncpoint. None
of the rest (fences, priv cmdbufs) is needed for that, so it hasn't been
ideal to couple with the user-allocated syncpts.

With user syncpts now provided by channel_user_syncpt, remove the
user_managed flag from the kernel sync api.

This allows moving all the kernel submit sync code to be conditionally
compiled in only when needed, and separates the user sync functionality
in a more clear way from the rest with a minimal API.

[this is squashed with commit 5111caea601a (gpu: nvgpu: guard user
syncpt with nvhost config) from
https://git-master.nvidia.com/r/c/linux-nvgpu/+/2325009]

Jira NVGPU-4548

Change-Id: I99259fc9cbd30bbd478ed86acffcce12768502d3
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2321768
(cherry picked from commit 1095ad353f5f1cf7ca180d0701bc02a607404f5e)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2319629
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2020-12-15 14:13:28 -06:00
Konsta Hölttä
b813adbf49 gpu: nvgpu: require os fence when only supported
If the os fence is the only kind that's supported, fail a submit if the
user wants fences but doesn't explicitly request sync fences, expecting
syncpoints. Syncpoint support is advertised to userspace in the gpu
characteristics, so userspace already has the knowledge to request the
correct sync type.

Do this check at the ioctl level. The in-kernel stuff that needs submits
(cde, copyengine) can work without syncpoints and sync fences are used
only in userspace.

Fail a submit also if CONFIG_SYNC is not set and sync fences are
requested. Lack of kernel support doesn't guarantee that userspace would
still wrongly want that.

Clarify the deferred cleanup requirements. The sync framework is needed
only for post sync fences, but deferred cleanup is still always needed
with semaphores because the internal tracking is done with dynamically
allocated (although small) objects.

Jira NVGPU-4548

Change-Id: I2e5a6554930cb413b2bb46ddfe388e41390bc7e4
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2321715
(cherry picked from commit d870956170906eae1088846ec05266c859669771)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318157
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2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
62c06723dd gpu: nvgpu: sim: defer sim buffers allocation
Allocate sim buffers only after chip specific
memory properties are enabled.

JIRA NVGPU-5281

Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: I7b64b3a51b8cd66dbefd22a09216b2caaeccacbf
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324083
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2020-12-15 14:13:28 -06:00
Sagar Kamble
c37c1b5474 gpu: nvgpu: fix null pointer access in nvgpu_vm_find_mapping
mapped_buffer sgt is deallocated by dma_buf_unmap_attachment in the
function nvgpu_vm_find_mapping if it is previously mapped. Debug
print referred to the sgt page after deallocating hence move it
before deallocation.

Fix below null pointer dereference issue:

[   34.692659] Unable to handle kernel NULL pointer dereference
at virtual address 0000000000000000
...
[   34.699820] Hardware name: Jetson-AGX (DT)
[   34.709136] pc : nvgpu_vm_find_mapping+0xcc/0x240 [nvgpu]
[   34.714377] lr : nvgpu_vm_find_mapping+0xa4/0x240 [nvgpu]
...
[   34.804523] Call trace:
[   34.807093]  nvgpu_vm_find_mapping+0xcc/0x240 [nvgpu]
[   34.812195]  nvgpu_vm_map+0xd4/0x480 [nvgpu]
[   34.816168]  nvgpu_vm_map_linux+0x15c/0x1c8 [nvgpu]
[   34.821237]  nvgpu_vm_map_buffer+0x14c/0x270 [nvgpu]
[   34.825962]  gk20a_as_dev_ioctl+0x320/0xfe0 [nvgpu]
[   34.830955]  do_vfs_ioctl+0xb8/0xa40
[   34.834449]  ksys_ioctl+0x80/0xb8
[   34.837430]  __arm64_sys_ioctl+0x1c/0x28
[   34.841630]  el0_svc_handler+0x80/0x1a8
[   34.845129]  el0_svc+0x8/0xc
[   34.848106] Code: f9400021 d360ff3a b9406a62 f940007c (f9400034)
[   34.854227] ---[ end trace 1d8c4efb211dc317 ]---

Bug 2834141

Change-Id: I281ac21071fcc2e3e6f3685798c8e77daba6d4a4
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2323361
Tested-by: Debarshi Dutta <ddutta@nvidia.com>
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Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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2020-12-15 14:13:28 -06:00
Konsta Hölttä
6cb6a970af gpu: nvgpu: don't update ch syncpt for user sync
g->ops.channel.set_syncpt() updates the inst block's allowed syncpt
field for the syncpoint that's allocated for kernelmode submits (if
any). This is different from the userspace-owned syncpoint that is used
with usermode submits, so don't call set_syncpt when creating the user
syncpt.

If the kernel sync object wouldn't exist, the call would even fail. The
allowed syncpt is written during nvgpu_channel_setup_bind() (if usermode
submit isn't requested), after the kernel syncpt is allocated.
Originally, just one syncpoint used to be shared for the kernel and
userspace; now that they're separate, this different path to update the
allowed syncpt would need other modifications to work with the user sync
if one would be used on platforms that care about the allowed syncpt.

Jira NVGPU-4548

Change-Id: If800e704ef8a3289e04c8d75a623affd6779e309
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2320357
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2020-12-15 14:13:28 -06:00
Debarshi Dutta
a2080a1208 gpu: nvgpu: add fuse clock support
1) added support for fuse clock directly from nvgpu linux build for GV11B
and GP10B.
2) added a common function platform_acquire_clock thats used by both
GP10B, GV11B to acquire their respective clocks.
3) remove use of tegra_fuse_clock_enable/disable APIs

The clock parsing code is changed to verify the clock-names obtained
via DT with the static clock-names in the platform code before proceeding
with clk_enable.

Bug 2887230

Change-Id: I177cde9c4bf1a8be6f3437f36e1c6f75cd9c9279
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2307136
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2020-12-15 14:13:28 -06:00
Konsta Hölttä
d0ffb335dc gpu: nvgpu: move nvgpu_has_syncpoints
nvgpu_has_syncpoints is more general than a channel synchronization
related, so move it to nvhost.c from channel_sync.c. Move the
declaration from gk20a.h to nvhost.h.

As the debugfs knob is Linux related, move it from struct gk20a to
struct nvgpu_os_linux.

Jira NVGPU-4548

Change-Id: I4236086744993c3daac042f164de30939c01ee77
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318814
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2020-12-15 14:13:28 -06:00
Sagar Kamble
401d4cbc5f gpu: nvgpu: reorganize tegra clocks enable/disable
When the tegra powergate support is not present, genpd takes care of
powergating. However, clocks are still controlled by nvgpu driver.
Hence enable/disable tegra clocks when the tegra powergate support
is not available.

Bug 2834141

Change-Id: I7ca4e5002604b30de6bddcf640d78b939136dd4d
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2316879
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
f254a09094 gpu: nvgpu: fix dgpu build for next kernels
Add the following changes to build dgpu sources for kernels after 4.14:
1. tegra_alloc_fd is defined by downstream tegra mc driver built with
   the flag CONFIG_NV_TEGRA_MC, hence make the nvgpu config
   NVGPU_USE_TEGRA_ALLOC_FD dependent on it.
2. dma_buf_ops.map_atomic is removed in kernel version 4.17.
3. gk20a_vidbuf_ops.set_drvdata and .get_drvdata are to be set
   under the config CONFIG_NVGPU_DMABUF_HAS_DRVDATA

Bug 2834141

Change-Id: If2351beddfd6f22a1a1da4499cacf6a1880ede76
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2316486
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
f91495c41d gpu: nvgpu: cond. compile with CONFIG_NV_TEGRA_MC
Protect tegra MC code under the config flag CONFIG_NV_TEGRA_MC.

Bug 2834141

Change-Id: Ibb883ca69ea26467f095aca22552b1ad20279cd9
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306434
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Thomas Fleury
8ec4395e82 gpu: nvgpu: build flag for deterministic channel
Add CONFIG_NVGPU_DETERMINISTIC_CHANNELS and fix
preprocessor #ifdefs to allow compiling kernel mode
submit without deterministic feature enabled.

Jira NVGPU-4661

Change-Id: I4aa678715824e8981d39bd8db0c5ae61ef3a675c
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2310325
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
cc043e1506 gpu: nvgpu: cond. compilation of tegra dvfs code
Protect the code dependent on tegra dvfs and bpmp dvfs code under the
config flags CONFIG_TEGRA_DVFS and CONFIG_NV_TEGRA_BPMP.

Also, update clk_config_dvfs and clk_program_na_gpc_pll to handle the
error value returned from g->ops.clk.predict_mv_at_hz_cur_tfloor.

Bug 2834141

Change-Id: I124d29f22e59fd6af7801ca859c4470483c8f7d8
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306433
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Sagar Kamble
490e1ee06c gpu: nvgpu: conditional compile of tegra powergate
Include tegra bpmp and powergate headers under the config flag
CONFIG_NV_TEGRA_BPMP.
tegra186-powergate.h included by tegra powergate header defines
TEGRA186_POWER_DOMAIN_GPU that can be used to conditionally
compile the railgate code similar to t194.

Bug 2834141

Change-Id: Ib52923ec02438f0f10ea78d6a8874f387e17ee2c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306435
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Sagar Kamble
59c6947fc6 gpu: nvgpu: add CONFIG_NVGPU_TEGRA_FUSE
Encapsulate the tegra fuse functionality under the config flag
CONFIG_NVGPU_TEGRA_FUSE.

Bug 2834141

Change-Id: I54c9e82360e8a24008ea14eb55af80f81d325cdc
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306432
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
3748be5792 gpu: nvgpu: move timer functions from soc files
Move following timer functions from soc header and c file to timer
header and c file:
1. nvgpu_delay_usecs
2. nvgpu_us_counter
3. nvgpu_get_cycles

Bug 2834141

Change-Id: I04cf7229a0d35c90a320bbe64e80912b08cccefb
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306431
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
92db0b3048 gpu: nvgpu: conditional compilation of dgpu code
There were few more dgpu related references unprotected by the config
flag. Fix those.

Bug 2834141

Change-Id: Ia9fd58d97552efeff84d6c0c52b8d5de481fab31
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306430
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Seema Khowala
007ecfb5bc gpu: nvgpu: support upto four stall interrupt lines
Add two new variables in nvgpu_mc struct to support
upto four stall interrupt lines.

Variables:-

Total number of stall interrupt lines:
u32 irq_stall_count

Array to store irq_stall interrupt number for upto 4
stall irq lines:
u32 irq_stall_lines[4]

JIRA NVGPU-4864

Change-Id: I9b43fc20c78dbcaf97fe8e685bb77963f06d3f99
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2310377
Tested-by: Lakshmanan M <lm@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Sagar Kamble
ea09ef92b5 gpu: nvgpu: conditional compilation of nvhost code
There were few more nvhost related references unprotected by the config
flag. Fix those.

Bug 2834141

Change-Id: Id7d94e3e6fa471f02697d121b557884c7287c26e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306437
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Sagar Kamble
4b97628278 gpu: nvgpu: conditional compile of ltc_streamid
ltc_streamid and tegra-swgroup.h header inclusion is applicable to
gp10b. Hence compile it under the flag CONFIG_ARCH_TEGRA_18x_SOC.

Bug 2834141

Change-Id: I79b8f5e0a4cfeff9298eca5f13a7d1c6f291f7ad
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2307298
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
d0850123a8 gpu: nvgpu: remove tegra_edp_notify_gpu_load usage
Since this is just a nop stub, remove it's usage to reduce the
downstream debt.

Bug 200593710
Bug 2834141

Change-Id: I13e16462d9555bb9ebae01de65c43f59e007785d
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2307299
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
40d3f7518b gpu: nvgpu: create of_chosen variable
nvgpu relies on this OF device_node variable to determine joint_xpu_rail
property. Instead of exporting it from the OF driver as nvgpu is not
available in the upstream, define it in the nvgpu itself.

Bug 200593710
Bug 2834141

Change-Id: I80b928b20869b93f5255b757bcc1758245ee2650
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2307297
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
fa9db74ba6 gpu: nvgpu: conditional compilation of vpr code
There were few more vpr related references unprotected by the config
flag. Fix those.

Bug 2834141

Change-Id: Ic934b7aeb303193c21b73921982a5df9c021ea9b
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306438
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Sagar Kamble
7b301c5ace gpu: nvgpu: cond. compile with CONFIG_TEGRA_BWMGR
Protect tegra bwmgr code under the config flag CONFIG_TEGRA_BWMGR.

Bug 2834141

Change-Id: Icb3c9a363a639e3fd8e91ef12dcb62ba7e498747
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306436
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Deepak Nibade
7a4ecc8966 gpu: nvgpu: make debugger register access ELPG protected
Some of the APIs that access debugger register are not protected
from ELPG. This might trigger PRI access timeouts for corresponding
registers if GR engine is power gated.

Add nvgpu_pg_elpg_protected_call() to protect against ELPG.

Bug 2820066

Change-Id: I467ea28aaea1c0e36c2d6aabce6a2daea6ee9911
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306383
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Thomas Fleury
c383b631d7 gpu: nvgpu: check power state in pci shutdown
Bail out if dGPU has not been powered on,

Bug 2867345

Change-Id: I3c388f9fb801cc97de7d9d2c9c3b21bc88e530fa
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2304269
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Nicolin Chen
5e854efa65 gpu: nvgpu: Maximize DMA segmentation boundary
Linux kernel has a default 32-bit segmentation boundary for
any device that doesn't explicitly configure it. When nvgpu
tries to allocate a larger memory > 4GB, iommu_dma_map_sg()
function in the kernel will take this boundary into account
and add an internal padding to the allocated IOVA space:

|<---IOVA space 1--->|<---padding--->|<---IOVA space 2--->|

When DMA reads/writes the memory using this discountinued
IOVA space, it may end up with accessing the padding part,
instead of the IOVA space 2.

So this patch adds dma_set_seg_boundary() to nvgpu driver,
by maximizing the segmentation boundary up to DMA_BIT_MASK
to ensure a continued IOVA space.

Bug 200558567

Change-Id: I979d56681dddca56f1b02fce83dc81147a6b0d82
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2304150
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Chris Dragan <kdragan@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Sagar Kamble
630eaa46cb gpu: nvgpu: update the config options & makefile
Added dependency between the Kconfig options as follows where
'->' indicates 'depends on' relation:

SUPPORT_CDE -> COMPRESSION -> DMABUF_HAS_DRVDATA
DGPU -> GK20A_PCI

Defined Kconfig option for VPR and for DGPU that is dependent GK20A_PCI
as well. DGPU related sources are now compiled under config flag DGPU.
Also update conditional compilation of the driver paths w.r.t DGPU,
VPR and COMPRESSION flags.

Bug 2834141

Change-Id: Ia0a39d6d4cf8b36e7f955b7355a5ab41783f821c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299627
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Aaron Tian
ef69bbc92b gpu: nvgpu: add unified path of GPU devfreq dev
Add a symbolic link: /sys/devices/gpu.0/devfreq_dev which
pointed to GPU devfreq device: /sys/devices/gpu.0/devfreq/
devfreq<N>. The unified path won't be changed when the
number devfreq<N> is changed.

Bug 200588449

Change-Id: If00c9f9517a13a952d54a2963f31db81fd52e6fb
Signed-off-by: Aaron Tian <atian@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298606
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Leon Yu <leoyu@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
74ae8bb20b gpu: nvgpu: add CONFIG_NVGPU_DMABUF_HAS_DRVDATA
dma_buf private data is not supported in upstream kernel. Update
the logic of pin/unpin when this support is not present.

Separate out the related functions to new file and select logic
based on new config flag CONFIG_NVGPU_DMABUF_HAS_DRVDATA.

Bug 2834141

Change-Id: I921758727b1bfc3690f2ab26bccd9befae14d782
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294098
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Abdul Salam
29d4831780 gpu: nvgpu: Segregate volt unit members based on their accessibility
Currently all unit specific private members are inside ucode_volt_inf.h.
This patch moves the members specific to pmuif to ucode_volt_inf.h and
local to volt.h.
Append all unit specific local functions with volt/nvgpu.
Move volt specific rpc handler from g->pmu to g->pmu->volt.

NVGPU-4492

Change-Id: I626e002b3876c6c5330dec4396b7661b986c6119
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299555
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
Sagar Kamble
18f9d05aae gpu: nvgpu: spec_barrier & DMA_ERROR_CODE update
These macros are not defined in future kernel.

Bug 2834141

Change-Id: Ib2ee419b66f4d949fd538dfbb04b8cffa73c1e44
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299626
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
6c4a0bb6cd gpu: nvgpu: API updates for newer kernel
access_ok, totalram_pages and zap_vma_ptes are updated in the newer
kernel. Update accordingly.

Bug 2834141

Change-Id: I3097308740f1af3092ac0a5ac2f0146db8148e12
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294097
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Sagar Kamble
d0d8ef79d1 gpu: nvgpu: use READ_ONCE/WRITE_ONCE
In the upstream kernel ACCESS_ONCE is now deprecated with reason as
given in the following related commit:

    commit 381f20fceba8e ("security: use READ_ONCE instead of deprecated
    ACCESS_ONCE")

    ACCESS_ONCE() does not work reliably on non-scalar types. For
    example gcc 4.6 and 4.7 might remove the volatile tag for such
    accesses during the SRA (scalar replacement of aggregates) step.

Replace usages of ACCESS_ONCE with READ_ONCE and WRITE_ONCE in nvgpu.

Bug 2834141

Change-Id: I9904c49e1a4d7b17ed2fe54360051d08595a2982
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294096
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Abdul Salam
8e840a5af1 gpu: nvgpu: Segregate clk unit members based on their accessibility
Current clk unit has multiple header files under include folder.
This has combination of public struct which is accessed outside the
unit and private struct which is accessed within clk unit.
This patch segregates them based on their accessibility.
All private items are moved into ucode_clk_inf.h from include which only
clk can access.
All public items are moved into include/clk.h which other units can
access and removed the clk_xxx.h files

NVGPU-4689

Change-Id: I469270ae539e09a3f6fe6187207791732407863e
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298220
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00
Dinesh
0ae451059c gpu: nvgpu: Fix misra rule 5.1
This is fixing the following misra violation

MISRA 5.1 :
	Declaration with identical names.

The first 31 characters of identifiers
"nvgpu_nvhost_syncpt_unit_interface_get_aperture" and
"nvgpu_nvhost_syncpt_unit_interface_get_byte_offset" are identical.

JIRA NVGPU-4811

Change-Id: Ib862c4acd53cf748b47c1edffa91b5f033c08953
Signed-off-by: Dinesh <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298136
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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2020-12-15 14:13:28 -06:00
Nitin Kumbhar
9770723639 gpu: nvgpu: add checks for kzalloc() allocations
Check kzalloc() allocations for failures and return
an error if an allocation fails.

Bug 2279948

Change-Id: I8a2c3b84904da897ad6118900c11489c8656c20f
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2020123
(cherry picked from commit fadd0014da)
(cherry picked from commit 73254fc51281370b2bcce06b3e890d8da725d8d5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298097
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Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
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2020-12-15 14:13:28 -06:00
Abdul Salam
17cc9b2b98 gpu: nvgpu: Refactor Clock unit.
Current clk unit has multiple header files under pmuif folder.
This has combination of public struct which is accessed outside the
unit and private struct which is accessed within clk unit.
This patch segregates them based on their accessibility.
All private items are moved into ucode_clk_inf.h from pmuif which only
clk can access.
All public items are moved into include/clk.h which other units can
access
This will help in documentation of items for public items.

NVGPU-4491

Change-Id: Iccb0571e05ecb3cb13363390bed8c7214409b543
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292318
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2020-12-15 14:13:28 -06:00