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12 Commits

Author SHA1 Message Date
Richard Zhao
7af53dab3d nvgpu: add -Wshadow compile flag to posix build 
hvrtos/hypervisor added default cflags -Wshadow which is required by
AUTOSAR M3-4-1. The patch adds the flag to posix build to make sure the
code pass build on hvrtos.

Jira GVSCI-9976

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: If43281689a2aea95e4a768f59014f787f2e9ee23
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2728216
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-06-16 17:58:37 -07:00
Jinesh Parakh
5b38f48227 gpu: nvgpu: Fix Bad bit shift Coverity issues 
Fixed following Coverity Defects:
sec2_tu104.c : Bad bit shift operation
grmgr_ga10b.c : Bad bit shift operation
clk_gm20b.c : Bad bit shift operation
gsp_ga10b.c : Bad bit shift operation

CID 9869505
CID 9869506
CID 10062538
CID 10112176
CID 10127981

Bug 3460991

Signed-off-by: Jinesh Parakh <jparakh@nvidia.com>
Change-Id: I9cbb2403ccd41d6cbe99f73f27f915969094fa5b
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2689262
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-04-29 06:08:50 -07:00
Richard Zhao
e81a36e56a gpu: nvgpu: hal: fix compile error of new compile flags 
It's preparing to add bellow CFLAGS:
    -Werror -Wall -Wextra \
    -Wmissing-braces -Wpointer-arith -Wundef \
    -Wconversion -Wsign-conversion \
    -Wformat-security \
    -Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough

Jira GVSCI-11640

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: Ia16ef186da1e97badff9dd0bf8cbd6700dd77b15
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555057
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-01-13 12:36:19 -08:00
Sagar Kamble
cc043e1506 gpu: nvgpu: cond. compilation of tegra dvfs code 
Protect the code dependent on tegra dvfs and bpmp dvfs code under the
config flags CONFIG_TEGRA_DVFS and CONFIG_NV_TEGRA_BPMP.

Also, update clk_config_dvfs and clk_program_na_gpc_pll to handle the
error value returned from g->ops.clk.predict_mv_at_hz_cur_tfloor.

Bug 2834141

Change-Id: I124d29f22e59fd6af7801ca859c4470483c8f7d8
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306433
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Sagar Kamble
59c6947fc6 gpu: nvgpu: add CONFIG_NVGPU_TEGRA_FUSE 
Encapsulate the tegra fuse functionality under the config flag
CONFIG_NVGPU_TEGRA_FUSE.

Bug 2834141

Change-Id: I54c9e82360e8a24008ea14eb55af80f81d325cdc
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306432
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Abdul Salam
17cc9b2b98 gpu: nvgpu: Refactor Clock unit. 
Current clk unit has multiple header files under pmuif folder.
This has combination of public struct which is accessed outside the
unit and private struct which is accessed within clk unit.
This patch segregates them based on their accessibility.
All private items are moved into ucode_clk_inf.h from pmuif which only
clk can access.
All public items are moved into include/clk.h which other units can
access
This will help in documentation of items for public items.

NVGPU-4491

Change-Id: Iccb0571e05ecb3cb13363390bed8c7214409b543
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292318
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Shashank Singh
6fd0d972ae nvgpu: gpu: include qnx_init unit in doxygen documentation 
-Include qnx_init unit in doxygen documentation.
-Add documentation for gk20a_busy/idle and similar functions.
-Remove must_check return value as misra already reports violation for
 that.

Jira NVGPU-2571

Change-Id: I9573cb61865677944809dcc494d92f63cc6e0f58
Signed-off-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2176755
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
ajesh
ca39cacdaf gpu: nvgpu: fix MISRA violations in utils unit 
Rule 21.1 states that #define and #undef shall not be used on a
reserved identifier or reserved macro name.
Rule 21.2 states that a reserved identifier or macro name shall
not be declared.
Fix violations of the above rules in utils unit.

Jira NVGPU-3878

Change-Id: I4302c498f5fb533699d2e53b9d1ffe1e7ccf53f2
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2194035
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
ajesh
b095d73022 gpu: nvgpu: modify the ffs and fls interface 
Modify the ffs/fls interface function names to nvgpu_ffs and
nvgpu_fls.  The return bit values are numbered from 1 to 64.
A return value of 0 indicates an input of 0 value.

Jira NVGPU-3601

Change-Id: I1c151eeac1f94fe3b5b85bd5daf0488f75c5efa0
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2146119
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-07-11 05:43:55 -07:00
Mahantesh Kumbar
b691df5a02 gpu: nvgpu: compile out PMU members & headers for safety 
-compile out nvgpu_pmu members which are not required for
safety buid & modified source as required to support same.
-compile out PMU headers include which are not required for
safety code
-Removed unnecessary PMU header includes from some files

JIRA NVGPU-3418

Change-Id: I5364b1b16c46637d229e82745dd2846cb6335a72
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128228
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-06 06:55:58 -07:00
Thomas Fleury
97762279b7 gpu: nvgpu: make nvgpu_init_mutex return void 
Make the nvgpu_init_mutex function return void.
In linux case, this doesn't affect anything since mutex_init
returns void.
For posix, we assert() and die if pthread_mutex_init fails.

This alleviates the need to error inject for _every_
nvgpu_mutex_init function in the driver.

Jira NVGPU-3476

Change-Id: Ibc801116dc82cdfcedcba2c352785f2640b7d54f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130538
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-05 10:25:52 -07:00
Philip Elcan
edaddb9bb2 gpu: nvgpu: create nvgpu.common.hal.clk 
Create unit nvgpu.common.hal.clk in by moving clk_*.[ch] files to
hal/clk path. Also update makefiles and include files to match.

JIRA NVGPU-2020

Change-Id: Ied217cfac2b000a2d22eda582d6030d0479b1310
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2101400
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-22 14:15:22 -07:00