Terje Bergstrom
5c8f1619ce
gpu: nvgpu: Use gm20b version of BAR1 bind
...
All chips should use the waiting version of BAR1 bind since gm20b.
Change gp10b and gp106 to do that. BAR1 is not used in Volta.
JIRa NVGPU-588
Change-Id: Ib6957ebea4effa7c64f4d71522447fa6245728ed
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1730895
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
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2018-06-14 06:44:07 -07:00
Terje Bergstrom
d71d38087d
gpu: nvgpu: Separate timer from bus
...
Code touching timer registers was combined with bus code. They're two
logically separate register spaces, so separate the code accordingly.
JIRA NVGPU-588
Change-Id: I40e2925ff156669f41ddc1f2e7714f92a2da367b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1730893
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2018-06-14 06:44:07 -07:00
Terje Bergstrom
5215d65c25
gpu: nvgpu: Remove setting of PRI timeout
...
PRI timeout should always use the HW initialization value. Do not set it
explicitly.
JIRA NVGPU-588
Change-Id: Idb63caba07c5fa7e0439e572861443f2783d0adc
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1730892
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2018-06-14 06:44:07 -07:00
Terje Bergstrom
f9a2f449a5
gpu: nvgpu: Remove direct MC and GR deps from bus
...
bus_gk20a.c had some debug dump references to MC and GR registers.
The dumps have not been very useful, so instead of refactoring the
code just remove the dumps.
JIRA NVGPU-588
Change-Id: Id974731716d058ef4a3fe77240c11b1c53db169c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1730891
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com >
Reviewed-by: Alex Waterman <alexw@nvidia.com >
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2018-06-14 06:44:07 -07:00
Terje Bergstrom
dbb8792baf
gpu: nvgpu: Move setting of BAR0_WINDOW to bus
...
Move setting of BAR0_WINDOW to bus HAL. Also moves the usage of spinlock to
common code so that pramin_gk20a.[ch] can be deleted.
JIRA NVGPU-588
Change-Id: I3ceabc56016711b2c93f31fedf07daa778a4873a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1730890
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2018-06-14 06:44:07 -07:00
Terje Bergstrom
ed65f1f26e
gpu: nvgpu: Move setting priv interrupt to priv_ring
...
Registers to set priv interrupts are in priv_ring, but the code was
in bus HAL. Move the code and related HALs to priv_ring instead.
JIRA NVGPU-588
Change-Id: I708d11f77405dbba86586a0d1da42f65bcc1de9d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1730889
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2018-06-14 06:44:07 -07:00
Terje Bergstrom
4eae06299b
gpu: nvgpu: bus: Remove use of extra includes
...
bus_gk20a.c had a few unnecessary includes. Remove them to speed up
compilation.
JIRA NVGPU-588
Change-Id: I0e94e788104ba6acb259c315734e6b42f69a8074
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1730888
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com >
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2018-06-14 06:44:06 -07:00
Terje Bergstrom
2dbf961365
gpu: nvgpu: Move bus HAL to common
...
Move implementation of bus HAL to common/bus.
Change-Id: Ia89350f9d94f3ccfd5500a340e6a677cd7d4cfaa
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1726337
GVS: Gerrit_Virtual_Submit
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2018-05-25 10:15:40 -07:00
