The call of gk20a_scale_init has been moved to after finialize poweron
in commit f445ab63 gpu: nvgpu: enable devfreq after finalize poweron,
hence remove the duplicate call in nvgpu_probe().
Given that the platform clk_round_rate call need valid scaling profile,
need to put gk20a_scale_init call to a place before calling
gp10b_init_gpu_characteristics().
This change also adds checking of valid scaling profile private data.
Bug 2107631
Change-Id: I8cb2a65ddf10771860c0e7d4e5db774d8e3b6aaa
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1705734
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Hayden Du <haydend@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
PMU ucode is updated to include LDIV slowdown factor in gr_init_param command.
- Defined a new version gr_init_param_v1.
- Updated the PMU FW version code.
- Set the LDIV slowdown factor to 0x1e by default.
- Added sysfs entry to program ldiv_slowdown factor at runtime.
Bug 200391931
Change-Id: I24cdbce4839f91f163bd357056d910da9fb13478
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1680846
GVS: Gerrit_Virtual_Submit
Tested-by: Jonathan Mccaffrey <jmccaffrey@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Jonathan Mccaffrey <jmccaffrey@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
For gp10b, there is a single whitelist maintained for both global and
per-context registers, for gm20b, there are separate whitelists
maintained for global and per-context registers. This patch updates
the failing registers in the bug into the per-context list.
Bug 200363092
Change-Id: I1906ea46d4b37f9aa8d13833a5bba4a5f7c6bbe5
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1603660
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Cache the rate used in clk_set_rate().
Return that cached rate on clk_get_rate(), don't read from hardware.
This cached rate is used to avoid duplicate requests to clk_set_rate().
Motivation is to support multiple governors for gpu clk.
Reading clock from hardware is unreliable in multi-governor situation.
Relying on hardware clock value could mislead the kernel gpu governor
in its scaling calculations.
Bug 2051688
Change-Id: I116b0ef73c51121b57ef36d08b6c67f49fdbf656
Signed-off-by: Arun Kannan <akannan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1662759
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
In case deferred_reset_pending is set in gk20a_fifo_handle_mmu_fault(), we skip
resetting the engines and skip setting the error notifier
Then we call gk20a_channel_abort()/gk20a_fifo_abort_tsg() which aborts the
channels, and resets the syncpoint values to release all the waiters
But since we don't set error notifier this could lead User to assume a
successful submission without any error
To fix this disable channel/TSG in case deferred_reset_pending is set and skip
calls to gk20a_channel_abort()/gk20a_fifo_abort_tsg()
Note that we finally abort the channel when channel is being closed
Bug 200363077
Change-Id: Ia48ca369701c14d1913d8f7b66ed466b7b840224
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1664319
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
In gm20b_tegra_postscale(), we use platform->railgate_lock to check if GPU is
railgated or not
But platform->railgate_lock was introduced only to prevent unrailgating in midst
of gk20a_do_idle() sequence
This lock is not the right way to check railgate status since it is still
possible to railgate GPU with this lock being held
Hence remove acquire/release of platform->railgate_lock from
gm20b_tegra_postscale()
Bug 1962265
Bug 200389183
Change-Id: I6208063de3fa77ed71e8fb0c011367fb66151193
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1536573
(cherry picked from commit 68bce66be338e48f4921f645b10b3fa5994fe1d4)
Reviewed-on: https://git-master.nvidia.com/r/1659905
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
In the nvgpu_big_free() function the passed in address is checked
to see what type of address it is: kmalloc or vmalloc. This change
uses the is_vmalloc_addr() instead since this is a much clearer and
easier way to determine if a virtual address should be vfree()ed.
Anything not a vmalloc address is then assumed to be a kmalloc()
address.
rel-28: Note that this code is actually in <nvgpu/kmem.h> on rel-28
so this cherry-pick took that into account.
Bug 2049449
Change-Id: I2bd9441d3c5fc455f03ec2075d012c607280ad5f
Reviewed-on: https://git-master.nvidia.com/r/1644802
(cherry picked from commit a63e715117)
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1645512
Reviewed-by: Arun Kannan <akannan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Fix a race condition where we'd still be booting up the gpu and/or
initializing the driver but elsewhere assume that all is done already.
Some userspace APIs to make sure that we're ready by testing
g->gr.sw_ready, but this flag is set in the middle of bootup; there are
other things after gr initialization. Add a new flag that is enabled
after bootup is fully complete at the end of finalize_poweron, and
change the checks in user API paths to test the new flag only.
These checks are only in the ioctl paths for ctrl, dbg and tsg, and in
the ctrl device's opening path.
The gr.sw_ready flag is still left there to signify whether just gr has
had its bookkeeping initialized.
Bug 200370011
Change-Id: I2995500e06de46430d9b835de1e9d60b3f01744e
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1640136
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Remove dependency for nvgpu to invoke devfreq govenor on every
gk20a_busy/idle() call. This dependency was originally necessary to
track GPU load (busy vs idle) in software. However, since we currently
read the load GPU from HW/PMU there is no need to invoke the devfreq
governor in this path. Instead it can use timer-based polling.
Jira NVGPU-20
Change-Id: Id09f89a8a562ed49164a2e06dcbb901e4a46e7d5
Reviewed-on: https://git-master/r/1473140
(cherry picked from commit 635e9946b7)
Signed-off-by: Jon McCaffrey <jmccaffrey@nvidia.com>
Signed-off-by: Arun Kannan <akannan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1619234
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Hayden Du <haydend@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
In current design, the new increments are added to the threshold for
fence allocation. So if it fails to get gk20a_fence, decrease the new
increments before bailing out from __gk20a_channel_syncpt_incr()
and propagating the error code.
Bug 1867651
Change-Id: I8a21bf0afef1d9ebe660ebea59d877acad1b726a
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/1300421
(cherry picked from commit a4a55f1851834042ab14e487f1ff0d497509ff24)
Reviewed-on: https://git-master.nvidia.com/r/1609824
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add NVGPU_IOCTL_CHANNEL_PREEMPT_NEXT ioctl to check host and FECS status
and preempt pending load of context not belonging to the calling channel on
GR engine during context switch. This should be called after a submit with
NVGPU_SUBMIT_GPFIFO_FLAGS_RESCHEDULE_RUNLIST to decrease worst case submit
to start latency for high interleave channel.
There is less than 0.002% chance that the ioctl blocks up to couple
miliseconds due to race condition of FECS status changing while being read.
Also fix bug with host reschedule for multiple runlists which needs to write
both runlist registers.
Bug 1987640
Bug 1924808
Change-Id: I0b7e2f91bd18b0b20928e5a3311b9426b1bf1848
Signed-off-by: David Li <davli@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1549598
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Add a sysfs node to allow root user to set PRI_FE_GFXP_WFI_TIMEOUT, for gp10b
only, in units of sysclk cycles. Store the set value in a variable, and write
the set value to register after GPU is un-railgated.
NV_PGRAPH_PRI_FE_GFXP_WFI_TIMEOUT is engine_reset after Bug 1623341.
Change default value to be specified in cycles, rather than time. This value
is almost the current value in cycles calculated each boot.
Bug 1932782
Change-Id: I0a4207e637cd1413a1be95abe2bcce3adccf76fa
Signed-off-by: Jonathan McCaffrey <jmccaffrey@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1540939
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
NVGPU_SUBMIT_GPFIFO_FLAGS_RESCHEDULE_RUNLIST is only used by realtime
priority EGL context, which checks for CAP_SYS_NICE during context
creation in userspace, so it wasn't secure against unprivileged program
spoofing submit ioctl with this flag to stall GPU progress of others.
This flag does increase duration of submit by approx 16us,
mostly due to register accesses and PMU FIFO mutex.
Bug 1989493
Bug 1854791
Bug 1968813
Change-Id: I086b1d14f286abf8bd2d2dfae5945974b7fe6d1f
Reviewed-on: https://git-master.nvidia.com/r/#/c/1558644
Signed-off-by: David Li <davli@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1558683
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Add these bits in the gpu characteristics flags:
NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_NO_JOBTRACKING - fast
submits with no in-kernel job tracking are supported.
NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_FULL - deterministic
submits also with job tracking and num_inflight_jobs set are supported.
Either of these may get disabled if the particular channel or submit
still requires features that block these.
Make gk20a_channel_sync_needs_sync_framework() take a gk20a pointer
instead of a channel pointer so that it can be called without a channel.
It does not need any per-channel data.
Bug 20029130
Bug 200274674
Change-Id: I5f82510b6d39b53bcf6f1006dd83bdd9053963a0
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1456845
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit ee9733e587 in
dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/1558993
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
If platform probe fails as a result of DEFER_PROBE, it should be
reported as dev_info instead of dev_err.
Bug 1926777
Change-Id: Iba4392abdd6089da9678695b8ee7f2c92bea1505
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: http://git-master/r/1492711
(cherry picked from commit 896dc2b1b979107f968ba91582210216ab8800b7 in
dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/1550437
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Add a new sysfs node pd_max_batches for setting max batches value in
NV_PGRAPH_PRI_PD_AB_DIST_CONFIG_1_MAX_BATCHES register which controls
max number of batches per alpha-beta transition stored in PD.
Bug 1927124
Change-Id: I2817f2d70dab348d8b0b8ba19bf1e9b9d23ca907
Signed-off-by: Sandeep Shinde <sashinde@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1544104
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
NVGPU_SUBMIT_GPFIFO_FLAGS_RESCHEDULE_RUNLIST causes host to expire
current timeslice and reschedule from front of runlist.
This can be used with NVGPU_RUNLIST_INTERLEAVE_LEVEL_HIGH to make a
channel start sooner after submit rather than waiting for natural
timeslice expiration or block/finish of currently running channel.
Bug 1968813
Change-Id: I632e87c5f583a09ec8bf521dc73f595150abebb0
Signed-off-by: David Li <davli@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1537218
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
When compiling the kernel with an O= option (which stores built files
outside the source tree) the kernel adds various extra source paths to the
system include path. However, this doesn't happen when building in-tree.
Adjust the main nvgpu Makefile to ensure all required paths are part of
the system include path so that all headers can be found.
Bug 1978395
Change-Id: I51ffc78b3863b89ebb5f051c963a8016258534a3
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1544320
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
The new SET_BES_CROP_DEBUG3 sw method is used to flip two fields
in the NV_PGRAPH_PRI_BES_CROP_DEBUG3 register. The sw method is
used by the user space driver to disable enough ROP optimizations
to maintain ZBC state of target tiles.
Bug 1942454
Change-Id: Id4e4d9d06c6c66080d06b6d4694546fe5cba8436
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1516202
(cherry picked from commit d3415f27c4)
Reviewed-on: https://git-master.nvidia.com/r/1520447
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Mathias Heyer <mheyer@nvidia.com>
Tested-by: Mathias Heyer <mheyer@nvidia.com>
msleep is not recommended for (1ms - 20ms). So use usleep_range
instead to have a more deterministic sleep time.
Also fix the print for target_ref_count that could either be 2 or
1 based on whether GPU rail-gating is enabled or not.
Bug 200294536
Change-Id: I26c9ed8a1badc84db5efa89347a227e6b46f603c
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/1500409
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
In gr_gk20a_handle_sm_exception(), we disable all SM exceptions
if SM debug mode is set and irrespective of exception type
But we should not disable SM exceptions if the only
exception is BPT_INT
Fix this by checking if only interrupt is BPT_INT and
do not disable SM exceptions in that case
Note that for rest of the exceptions we still need to
disable SM exceptions
Also, remove redudant checks of sm_debugger_attached since
we bail out early if this flag is not set anyways
Bug 200264850
Change-Id: I7732567273fc88f6c98f25372fd8619d92339734
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1487040
(cherry picked from commit f76febb962)
Reviewed-on: http://git-master/r/1496601
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
In order to perform timestamps correlation for FECS
traces, we need to collect GPU / GPU timestamps
samples. In virtualization case, it is possible for
a guest to get GPU timestamps by using read_ptimer.
However, if the CPU timestamp is read on guest side,
and the GPU timestamp is read on vm-server side,
then it introduces some latency that will create an
artificial offset for GPU timestamps (~2 us in
average). For better CPU / GPU timestamps correlation,
Added a command to collect all timestamps on vm-server
side.
Bug 1900475
Change-Id: Idfdc6ae4c16c501dc5e00053a5b75932c55148d6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1472447
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
API gk20a_pm_resume() is called during system resume.
While unrailgating in this path, we request MAX EMC,
but then we never request a lower frequency after boot
completes.
To fix this, call gk20a_scale_notify_busy() after boot
completes in gk20a_pm_resume() so that we request
a lower EMC corresponding to current clock value
Also, add corresponding gk20a_scale_notify_idle()
call to gk20a_pm_suspend()
Bug 200308543
Change-Id: I3859222abdf67805673467f383981be519a1cece
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1484660
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Before this commit call to EMC BWMGR in postscale procedure was skipped
when GPU rail is ON (= GPU is running). It should be the other way
around - call should be skipped when GPU is rail-gated.
Bug 200267304
Change-Id: Id4da84b3d0ed0606017cc53a58e2917d486fa13e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1479769
(cherry picked from commit ab22d66386)
Reviewed-on: http://git-master/r/1482812
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
We use g->busy_lock in gk20a_do_idle() to prevent submitting
more jobs to h/w and to wait for currently running jobs to
finish
But requesting this lock in gk20a_idle() prevents decrementing
runtime counter and hence gk20a_do_idle() can timeout with
below prints
[ 148.904739] gk20a 17000000.gp10b: Timeout detected @
gk20a_do_idle+0x30/0x38
[ 148.912185] gk20a 17000000.gp10b: __gk20a_do_idle: failed to idle -
refcount 4 != 1
Hence skip requesting this lock in gk20a_idle()
Bug 200294536
Change-Id: I060075fdee1b68e1b5fa11baa44a3f5ce4917d94
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1480777
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This change adds a new sysfs node to allow configuring CZF_BYPASS, to
enable platforms with low context-switching latency requirements.
/sys/devices/17000000.gp10b/czf_bypass
Values:
0 - always
1 - lateZ (default)
2 - single pass
3 - never
The specified value will apply only to newly allocated contexts.
Bug 1914014
Change-Id: Ibb9a8e86089acaadaa7260b00eedec5c80762d6f
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/1478567
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
When CONFIG_DEBUG_FS is not set, lots of gpu_dbg_info spew.
To reduce the debug logs, set GK20A_DEFAULT_DBG_MASK to 0.
Bug 1885240
Change-Id: I3f60ce1b205b316641228a34fa791df7fab48c9e
Signed-off-by: Jake Park <jakep@nvidia.com>
Reviewed-on: http://git-master/r/1474997
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kamal Balagopalan <kbalagopalan@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
dev_info() is used in place of dev_err() when secure buffer allocation
is failing.
Bug 200302186
Change-Id: Ia43925985b0a0a79e03863b91e475068ee8449c9
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: http://git-master/r/1474476
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
It is currently possible to set GPCCLK lower than the
minimum allowed frequency.
Clip target GPCCLK/MCLK according to valid min/max range
in arbiter. We could do this before submitting request to
arbiter, but then we would loose information on the
requested target frequency. Instead, we cache the clock
range in arbiter context, and check target frequency when
running arbiter.
Bug 200288036
Change-Id: I29f5176e6365a926d1041430c05a63f0c8447e2b
Reviewed-on: http://git-master/r/1460834
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
(cherry picked from commit eb626903e4fc046fe1f0eaee703c857e9a0f2b4d)
Reviewed-on: http://git-master/r/1461882
(cherry picked from commit 3615061045276c8913057e1c0e8cc443b70d2ad9)
Reviewed-on: http://git-master/r/1467627
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
In gk20a_pm_shutdown(), we do not check return value
of gk20a_pm_prepare_poweroff
In some cases it is possible that gk20a_pm_prepare_poweroff()
returns -EBUSY (this could happen if engines are busy)
so we don't clean up s/w state and directly
trigger GPU railgate
In case some interrupt is triggered simultaneously
we try to access a register while GPU is already railgated
This leads to a hard hang in nvgpu shutdown path
Make below changes in shutdown sequence to fix this:
- check return value of gk20a_wait_for_idle()
- disable activity on all engines with
gk20a_fifo_disable_all_engine_activity()
- ensure engines are idle with gk20a_fifo_wait_engine_idle()
- check return value of gk20a_pm_prepare_poweroff()
- check return value of gk20a_pm_railgate()
Add a print when we bail out early in case
GPU is already railgated
Also, skip shutdown in case of VGPU since we don't need
to clean up virtual GPU, and RM server will take care of
cleaning h/w resources
Bug 200281010
Change-Id: I2856f9be6cd2de9b0d3ae12955cb1f0a2b6c29be
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1454658
(cherry picked from commit 6de456f840)
Reviewed-on: http://git-master/r/1461150
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
For dGPU, instance block is in vidmem, and context_ptr
was not properly computed, leading to reporting pid=0 in
FECS traces.
Use gk20a_mm_inst_block_addr, which handles all cases
to determine instance block physical address.
Bug 1899195
Change-Id: If003d9f00aff66d808e66c06baf6ded38699981a
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1461646
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This register is context_reset , and the value is context-switched with
GPU contexts
Bug 1855307
Bug 1871606
Change-Id: I4f871eaf94b4bb589ae179fc0ea972943acd0881
Signed-off-by: Jon McCaffrey <jmccaffrey@nvidia.com>
Reviewed-on: http://git-master/r/1452947
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
(cherry picked from commit f02591a23ab575d8592d3b2bebf94163c1323f17)
Reviewed-on: http://git-master/r/1459948
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Getting a timeout on kernel's own CE channels is unrecoverable.
Vidmem freeing also depends on CE to clear pages that have been
used so that they can be reused.
Disable watchdog on kernel's CE channels.
Bug 200287270
Change-Id: I87e0aa925d6d20485a5a19d2a6bfd050de34e968
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1454208
(cherry picked from commit 2ff3a9f374)
Reviewed-on: http://git-master/r/1457402
GVS: Gerrit_Virtual_Submit
The nvgpu timer API prints a message when the timer expires, but
expiration of that does not necessarily mean here that the job has
actually timed out, which is tested by comparing gp_get. Change the
expiration check to just peek instead of the default which prints to
log on expiration.
Bug 1887569
Bug 200291842
Jira NVGPU-21
Change-Id: Ifde34cff701eaed2f3ea727dba3ec8affeef26b9
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1329731
(cherry picked from commit 580c8112f0)
Reviewed-on: http://git-master/r/1452969
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
