Debarshi Dutta
17486ec1f6
gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
...
rename struct tsg_gk20a to struct nvgpu_tsg and rename struct
channel_gk20a to struct nvgpu_channel
Jira NVGPU-3248
Change-Id: I2a227347d249f9eea59223d82f09eae23dfc1306
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2112424
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com >
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
2019-05-06 02:56:53 -07:00
Seema Khowala
39070c653f
gpu: nvgpu: move FIFO_INVAL_* out of fifo_gk20a.h
...
Move and rename
FIFO_INVAL_ENGINE_ID -> NVGPU_INVALID_ENG_ID
FIFO_INVAL_TSG_ID -> NVGPU_INVALID_TSG_ID
FIFO_INVAL_RUNLIST_ID -> NVGPU_INVALID_RUNLIST_ID
FIFO_INVAL_SYNCPT_ID -> NVGPU_INVALID_SYNCPT_ID
FIFO_INVAL_CHANNEL_ID -> NVGPU_INVALID_CHANNEL_ID
JIRA NVGPU-2012
Change-Id: Ic4cc16ece64d85e22f16e4d28dcfd0c187bb65f3
Signed-off-by: Seema Khowala <seemaj@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2109011
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2019-05-02 23:40:26 -07:00
Debarshi Dutta
965062c2bc
gpu: nvgpu: remove direct tsg retrieval from fifo
...
Added
- nvgpu_tsg_check_and_get_from_id
- nvgpu_tsg_get_from_id
And removed direct accesses to f->tsg array.
Jira NVGPU-3156
Change-Id: I8610e19c1a6e06521c16a1ec0c3a7a011978d0b7
Signed-off-by: Thomas Fleury <tfleury@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2101251
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
2019-04-26 14:16:47 -07:00
Seshendra Gadagottu
ea59a46d69
gpu: nvgpu: avoid log spew on each railgate
...
Following log is getting printed with each rail gate:
nvgpu: 17000000.gv11b gv11b_fifo_ctxsw_timeout_enable:83
[INFO] fifo_eng_ctxsw_timeout disabled val = 0x000186a0
Avoided this log spew by changing log filter from nvgpu_info
to nvgpu_log_info.
JIRA NVGPU-1312
Change-Id: I05976b8107391771e6938a4a45489228c8fa4046
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2083046
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com >
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com >
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com >
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com >
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2019-03-27 17:25:54 -07:00
Seema Khowala
dfafddcc21
gpu: nvgpu: move common and chip specific ctxsw timeout
...
Delete apply_ctxsw_timeout_intr ops and add
ctxsw_timeout_enable ops
Move chip specific sched_error and ctxsw_timeout
functions to hal/fifo/fifo_intr_* and hal/fifo/ctxsw_timeout_*
Add nvgpu_rc_ctxsw_timeout function under common/rc/rc.c
Do not check ctxsw timeout for channels that are no more
bound to tsg.
JIRA NVGPU-1312
Change-Id: Ide977fb60b3b72a27d9f22873f7a416c3bd1181d
Signed-off-by: Seema Khowala <seemaj@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2075734
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
2019-03-25 22:47:45 -07:00