gpu: nvgpu: avoid log spew on each railgate

Following log is getting printed with each rail gate:
nvgpu: 17000000.gv11b   gv11b_fifo_ctxsw_timeout_enable:83
 [INFO]  fifo_eng_ctxsw_timeout disabled val = 0x000186a0

Avoided this log spew by changing log filter from nvgpu_info
to nvgpu_log_info.

JIRA NVGPU-1312

Change-Id: I05976b8107391771e6938a4a45489228c8fa4046
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2083046
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seshendra Gadagottu
2019-03-27 10:59:07 -07:00
committed by mobile promotions
parent 2c9eddf719
commit ea59a46d69

View File

@@ -79,8 +79,9 @@ void gv11b_fifo_ctxsw_timeout_enable(struct gk20a *g, bool enable)
fifo_eng_ctxsw_timeout_detection_disabled_f());
nvgpu_writel(g, fifo_eng_ctxsw_timeout_r(), timeout);
timeout = nvgpu_readl(g, fifo_eng_ctxsw_timeout_r());
nvgpu_info(g, "fifo_eng_ctxsw_timeout disabled val = 0x%08x",
timeout);
nvgpu_log_info(g,
"fifo_eng_ctxsw_timeout disabled val = 0x%08x",
timeout);
/* clear ctxsw timeout interrupts */
nvgpu_writel(g, fifo_intr_ctxsw_timeout_r(), ~U32(0U));
}