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gpu: nvpgu: Set voltage step size to 6250uV

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Currently volt step size for freq calculation is 2*lut_step_size_uv.
This causes P0 max freq to be dropped at temperature corners.
At higher temperature same voltage cannot give P0 Max and needs more volt.
With lut_step_size_uv we get more fine grained freq values with P0 Max.

Bug 2540811

Change-Id: I8851513ec07672c94dc166ea80d5ef386907aa91
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2081711
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Abdul Salam
2019-03-26 14:57:29 +05:30
committed by mobile promotions
parent b650c773ac
commit 2c9eddf719
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/nvgpu/common/pmu/clk/clk_vf_point.c
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@@ -748,7 +748,7 @@ int nvgpu_clk_vf_point_cache(struct gk20a *g)
}
} else {
voltage_min_uv = g->clk_pmu->avfs_fllobjs.lut_min_voltage_uv;
voltage_step_size_uv = g->clk_pmu->avfs_fllobjs.lut_step_size_uv * 2U;
voltage_step_size_uv = g->clk_pmu->avfs_fllobjs.lut_step_size_uv;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
pclk_vf_point = (struct clk_vf_point *)(void *)pboardobj;
gpcclk_voltuv =