2 Commits

Author	SHA1	Message	Date
Adeel Raza	d828e013db	gpu: nvgpu: common: MISRA rule 15.6 fixes ... MISRA rule 15.6 requires that all if/else/loop blocks should be enclosed by brackets. This patch adds brackets to single line if/else/loop blocks in the common directory. JIRA NVGPU-775 Change-Id: I0dfb38dbf256d49bc0391d889d9fbe5e21da5641 Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2011655 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Scott Long <scottl@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-02-05 19:23:47 -08:00
Debarshi Dutta	ebe6fa7fac	gpu: nvgpu: move syncpt specific cmdbuf methods to common/sync/ ... syncpt cmdbuf specific functions are only for the sync functionality of nvgpu and donot belong to fifo. construct files syncpt_cmdbuf_gk20a.h and syncpt_cmdbuf_gk20a.c under common/sync to contain the syncpt specific cmdbuf functions for arch gk20a. The word 'fifo' is also removed from the name of these functions. Jira NVGPU-1308 Change-Id: I1a1fd1d31f7decd1398f8e2ff625f95cf1f55033 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1975920 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-01-25 02:45:40 -08:00