Commit Graph

6 Commits

Author SHA1 Message Date
Deepak Nibade
67350e2c9c gpu: nvgpu: add flags to debugger specific headers
Add debugger/cyclestats/fecs_trace compile time flags to debugger
specific unit headers

Jira NVGPU-3506

Change-Id: Iedea5f274243a389dce91edecbc80c58753d4805
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137253
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-18 01:38:54 -07:00
Deepak Nibade
dfdd05a3d6 gpu: nvgpu: disable fecs trace support for safety builds
Compile all files with fecs trace support only if flag
NVGPU_FECS_TRACE_SUPPORT is set

remove CONFIG_GK20A_CTXSW_TRACE checks from within the files

add POSIX file for fecs trace support for compilation with
make command

Jira NVGPU-3414

Change-Id: I205e3494ce94138ab6c6fccf7fbcefc41f953c77
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120276
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-21 10:36:04 -07:00
Debarshi Dutta
4ffad99a16 gpu: nvgpu: fecs ctxsw trace for gm20b
Register gk20a non-arch-specific functions for gm20b
gpu_ops.fecs_trace,

Register nvgpu_os_linux_ops.fecs_trace.init_debugfs

gp10b_fecs_trace_flush is now replaced by gm20b_fecs_trace_flush in
fecs_trace_gm20b.* and the fecs_trace_gp10b.* files are removed.

Bug 2052906

Change-Id: Ie7598dbfe876e68ec0a1e2250dff9fa2de3c975f
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2088526
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-22 05:25:48 -07:00
Seshendra Gadagottu
0a4971621a gpu: nvgpu: moved fecs methods related code to gr falcon unit
Move all fecs methods related code to gr falcon unit and handle it
through generic gr.falocn.ctrl_ctxsw hal.
Following methods are moved from gr_gk20a.c to gr falcon unit.
fecs method and corresponding new fecs method def in gr_falcon.h:
gr_fecs_method_push_adr_discover_image_size_v ->
		NVGPU_GR_FALCON_METHOD_CTXSW_DISCOVER_IMAGE_SIZE
gr_fecs_method_push_adr_discover_pm_image_size_v ->
		NVGPU_GR_FALCON_METHOD_CTXSW_DISCOVER_PM_IMAGE_SIZE
gr_fecs_method_push_adr_discover_reglist_image_size_v ->
		NVGPU_GR_FALCON_METHOD_REGLIST_DISCOVER_IMAGE_SIZE
gr_fecs_method_push_adr_set_reglist_bind_instance_v ->
		NVGPU_GR_FALCON_METHOD_REGLIST_BIND_INSTANCE
gr_fecs_method_push_adr_set_reglist_virtual_address_v ->
		NVGPU_GR_FALCON_METHOD_REGLIST_SET_VIRTUAL_ADDRESS

Following fecs methods are moved from obj_ctx.c to gr falcon unit.
gr_fecs_method_push_adr_bind_pointer_v ->
			NVGPU_GR_FALCON_METHOD_ADDRESS_BIND_PTR
gr_fecs_method_push_adr_wfi_golden_save_v ->
			NVGPU_GR_FALCON_METHOD_GOLDEN_IMAGE_SAVE

Following fecs methods are moved from gr_gp10b.c to gr falcon unit.
gr_fecs_method_push_adr_discover_preemption_image_size_v ->
		NVGPU_GR_FALCON_METHOD_PREEMPT_IMAGE_SIZE
gr_fecs_method_push_adr_configure_interrupt_completion_option_v ->
			NVGPU_GR_FALCON_METHOD_CONFIGURE_CTXSW_INTR

Following fecs method is moved from zcull_gm20b.c:
gr_fecs_method_push_adr_discover_zcull_image_size_v ->
	NVGPU_GR_FALCON_METHOD_CTXSW_DISCOVER_ZCULL_IMAGE_SIZE

Following fecs method is moved from fecs_trace_gp10b.c:
gr_fecs_method_push_adr_write_timestamp_record_v
				-> NVGPU_GR_FALCON_METHOD_FECS_TRACE_FLUSH

Added new HAL in gr falcon for moving fecs_current_ctx_data from
gr_gk20a.c to gr_falcon_gm20b.c.
u32 (*get_fecs_current_ctx_data)(struct gk20a *g,
			struct nvgpu_mem *inst_block);

Added overlay for gm20b_gr_falcon_ctrl_ctxsw in newly added in
gr_falcon_gp10b.c for handling gp10b+ specific fecs methods:
gp10b_gr_falcon_ctrl_ctxsw

JIRA NVGPU-1881

Change-Id: I662d06f5176b29e6837d63c25e42de67505d48f5
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2087148
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-06 04:34:02 -07:00
Seshendra Gadagottu
1c8e8a53ec gpu: nvgpu: move ctxsw related code to gr falcon
In this CL, following ctxsw related code is moved to hal gr falcon.
1. gr_gk20a_wait_ctxsw_ready -> gm20b_gr_falcon_wait_ctxsw_ready
2. gr_gk20a_submit_fecs_method_op ->
			gm20b_gr_falcon_submit_fecs_method_op
3. gr_gk20a_submit_fecs_sideband_method_op->
			gm20b_gr_falcon_submit_fecs_sideband_method_op

Above functions are populated with following gr.falcon hals and called
from the current code as required:
int (*wait_ctxsw_ready)(struct gk20a *g);
int (*submit_fecs_method_op)(struct gk20a *g,
	struct fecs_method_op_gk20a op, bool sleepduringwait);
int (*submit_fecs_sideband_method_op)(struct gk20a *g,
	struct fecs_method_op_gk20a op);

Following static function also moved to gr_gk20a.c to hal gr falcon.
gr_gk20a_ctx_wait_ucode -> gm20b_gr_falcon_ctx_wait_ucode

JIRA NVGPU-1881

Change-Id: Icb4238dcacaf46ecfcada8bc8dcdeb68b6278bab
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2085189
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-03-31 17:34:02 -07:00
Seshendra Gadagottu
bd668dddc7 gpu: nvgpu: gr: fecs_trace: move chip specific files to hal
Move gr fecs chip specific files to hal folder from common.

JIRA NVGPU-2832

Change-Id: Ifc2c8bb5d94d11a95467483fe57894e9d5135857
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2076811
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-03-20 16:26:39 -07:00