3 Commits

Author	SHA1	Message	Date
Philip Elcan	065f98f669	gpu: nvgpu: init: add return for all init APIs ... This adds return values for all init APIs. This make all the init APIs have the same signature. This is a prerequisite to making a table of init functions. JIRA NVGPU-3980 Change-Id: I5b71fd06ad248092af133ffe908e2930acb6d2b0 Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2202973 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2020-12-15 14:05:52 -06:00
Seema Khowala	66cb9495a5	gpu: nvgpu: move mmu_fault_pending ops out from mm ... Moved -mmu_fault_pending mm ops to is_mmu_fault_pending mc ops -mmu_fault_pending fb ops to is_mmu_fault_pending fb.intr ops. This is needed to check if mmu fault intr is pending for volta onwards. Added is_mmu_fault_pending fifo ops. This is needed to check if mmu fault interrupt is pending for chips prior to volta JIRA NVGPU-1313 Change-Id: Ie8e778387cd486cb19b18c4aee734c581dcd9229 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2094895 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-04-11 22:25:01 -07:00
Seema Khowala	f07d933076	gpu: nvgpu: move chip specific mc to hal ... Move chip specific mc code from common/mc to hal/mc. Replace gk20a_readl/writel with nvgpu_readl/writel Replace 0xFFFFFFFFU with U32_MAX hash define Change local variable names to fix checkpatch errors/warnings Change BUG to WARN Move defines to header files Create new defines for hard coded delays JIRA NVGPU-2041 Change-Id: I3594121a81da37ef58c47e87c45e96441e4cf8c7 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2085268 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-04-02 01:04:44 -07:00