Commit Graph

11 Commits

Author SHA1 Message Date
Philip Elcan
2d0149c9ab gpu: nvgpu: resolve MISRA 10.3 violations
MISRA rule 10.3 prohibits implicit assigning of u64 to u32. The nvgpu was
assigning the value returned by ARRAY_SIZE which is a u64 to a u32. This
value was then returned in a function defined by gpu_ops.

This patch changes the return type for these gpu_ops to u64 and updates
the functions that implement the functions and lastly the saved value. This
removes the violation in this instance.

JIRA NVGPU-647

Change-Id: I2b93929633cf4809d8f65ee41f739f45d4c2cda7
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1805588
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-08-29 17:47:25 -07:00
Deepak Nibade
830d3f10ca gpu: nvgpu: cleanup uapi header includes
With recent rework in nvgpu most of the <uapi/linux/nvgpu.h> includes
are not needed so remove them

Remove use of NVGPU_DBG_GPU_REG_OP_* in gk20a/gr_gk20a.c and use common
definition instead

Remove use of NVGPU_ALLOC_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE in
gp10b/fifo_gp10b.c by defining new common flag
NVGPU_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE and then parsing it in API
nvgpu_gpfifo_user_flags_to_common_flags()

Jira NVGPU-363

Change-Id: I8e653275ea3f443f24be7284d54f2115636aba3f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1606108
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-11-28 09:47:03 -08:00
Terje Bergstrom
7885500a42 gpu: nvgpu: Change license for common files to MIT
Change license of OS independent source code files to MIT.

JIRA NVGPU-218

Change-Id: I1474065f4b552112786974a16cdf076c5179540e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1565880
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-09-26 11:37:32 -07:00
Sunny He
a15e110a9b gpu: nvgpu: Reorg regops HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
regops sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I7e2ccf158a8e7efa453a3326e86146660f18926f
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1530135
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Tested-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-08-02 14:43:25 -07:00
Terje Bergstrom
947a236063 gpu: nvgpu: gm20b: Use new delay APIs
Use platform agnostic delay functions instead of Linux kernel APIs.
This allows removing dependency to Linux header linux/delay.h. At the
same time remove #include lines for other unused Linux headers.

JIRA NVGPU-16

Change-Id: I05df9d72edaf4bb061febe0cb40fc8a7cf9f51c7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1460114
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
2017-04-13 13:44:41 -07:00
Terje Bergstrom
ea24da728f gpu: nvgpu: Add wrapper nvgpu/bsearch.h
Add wrapper header file nvgpu/bsearch.h. It #includes <linux/bsearch.h>
on Linux.

JIRA NVGPU-13

Change-Id: I5893f91f2e1bcda99c68f94d9298d87ad4591c8f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1461543
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-04-13 08:55:55 -07:00
Alex Waterman
335b3fa2fe gpu: nvgpu: Remove vmalloc.h and slab.h usage
Remove all usage of vmalloc.h and slab.h outside of the Linux specific
kmem API implementation code.

Bug 1799159
Bug 1823380

Change-Id: I5b2a91bd1057b272efeaddc24902f6133b35024f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1331703
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-04-04 16:57:08 -07:00
Terje Bergstrom
b2b1c6d2be gpu: nvgpu: Add HWPM registers to regops whitelist
Bug 1763653

Change-Id: Ief7ed56c29dba5836fc8435359a7c615ce53bb84
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1150717
Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:16 +05:30
Terje Bergstrom
f2bb4f10ce gpu: nvgpu: gp10b: Update regops whitelist
Update regops whitelist with two new registers.

Bug 1734151

Change-Id: Id09bdfb1733620bb75d4558299c5e9c7f66bb00b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1029772
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
2016-12-27 15:22:11 +05:30
Terje Bergstrom
03afa9b060 gpu: nvgpu: gp10b: Refresh regops whitelist
Context & global whitelists are same, so delete second copy. Update
the list.

Bug 200164983

Change-Id: I440ce04316120b8128baeabc002c55436cf41d5b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/931178
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sandarbh Jain <sanjain@nvidia.com>
Tested-by: Sandarbh Jain <sanjain@nvidia.com>
2016-12-27 15:22:10 +05:30
Terje Bergstrom
4b806879d5 gpu: nvgpu: gp10b: Add regops whitelists
Add regops whitelists for gp10b. The whitelist is generated, and is the
same for context switched and global registers.

Bug 1633363

Change-Id: I6d4d43d036d684c9f0d836a1a032f2c452604902
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/760935
2016-12-27 15:22:06 +05:30