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59 Commits

Author SHA1 Message Date
Mahantesh Kumbar
e7d706ccaf gpu: nvgpu: ACR load split feature support 
-Added method nvgpu_tu104_acr_ahesasc_sw_init()
 to set ACR-AHESASC properties.
-Added method nvgpu_tu104_acr_asb_sw_init() to
 set ACR-ASB properties.
-Modified method nvgpu_tu104_acr_sw_init() to
 call ACR AHESASC/ASB init & set bootstrap_owner
 to LSF_FALCON_ID_GSPLITE by removing older support
 of default ACR executing on SEC2.
-Added method tu104_bootstrap_hs_acr to execute
 ACR AHESASC & ASB ucode.
-Execute ACR-AHESASC(ACR hub encryption setter and
 signature checker) on SEC2 falcon to copy ucode
 blob from non-wpr to wpr & lockdown wpr then
 perform signature verification of LS falcon ucode
 whitout doing any LS flacon bootstrap.
-Once first stage of ACR is successful then execute
 ACR-ASB(ACR SEC2 booter) on GSP falcon to bootstrap
 SEC2-RTOS on sec2 falcon to perform PMU & GR
 falcons bootstrap.
-Enable SEC2 RTOS support by setting
 NVGPU_SUPPORT_SEC2_RTOS to true
-Added tu104 ACR remove support to clear
 allocated space

JIRA NVGPUT-134

Change-Id: I2d1777af83feda5e8f6845876177cce062c43ace
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1918937
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-16 23:40:53 -07:00
Deepak
7e8ca5f5e7 gpu: nvgpu: Remove cyclic dependency PMU<->GR. 
-Created & used HAL for dumping gr falcon stats.
-Trimmed the fecs_dump_falcon_stats to re-use code from
 generic falcon debug dump.

JIRA NVGPU-621

Change-Id: Ia008726915112b33f0aca68a48cb98b8ed2c3475
Signed-off-by: Deepak <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1923353
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-16 05:54:55 -07:00
matthewb
99ec61ebd5 gpu: nvgpu: Add tu104 pmm type-broadcast values 
Add the Tu104 values for type-specific broadcast->unicast expansion.

Bug 200454109

Change-Id: I73f32c86c5e443d83bc42e2e84cae2d5bf3bf7db
Signed-off-by: Matthew Braun <matthewb@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1921685
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-12 17:35:11 +05:30
Deepak Nibade
92c1949392 gpu: nvgpu: add separate unit for cyclestats_snapshot 
Add new separate unit common/perf/cyclestats_snapshot.c and add
corresponding header file include/nvgpu/cyclestats_snapshot.h

This unit is h/w independent and simply calls gops.perf.* HALs
exposed by perf unit to do the h/w configurations

Also remove gv11b/css_gr_gv11b.* files as h/w specific sequence
implemented in them is already moved to perf unit

Rename all cyclestats_snapshot HALs in the form nvgpu_css_*()

Jira NVGPU-1103

Change-Id: I303f6becb313ac918e06c495a5fe299947a1f0b1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1916652
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-12 17:35:11 +05:30
Vaibhav Kachore
e029856559 gpu: nvgpu: enable FECS trace support for TU104 
Bug 2137429

Change-Id: I6cd72f8e60ae33e1d5bf2d9725ea2ae66bb85e5c
Signed-off-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1921015
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-12 17:35:10 +05:30
aalex
e1a4bc8401 Revert "Revert "gpu: nvgpu: refactor SET_SM_EXCEPTION_MASK ioctl"" 
This patch was reverted as the "set_sm_exception_type_mask" HAL
assignment for gp10b was missing causing regression on Pascal platform.

Added missing gp10b HAL assignment for setting SM exception mask.

Bug 200447406
This reverts commit ce5228e094.

Change-Id: Ic48f4661fd4b6100310f8b4d23d902847e31f5df
Signed-off-by: aalex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1837653
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Tested-by: Sandarbh Jain <sanjain@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2018-10-12 17:35:10 +05:30
Terje Bergstrom
3bda3a0678 Revert "Revert "gpu: nvgpu: add turing support"" 
This reverts commit 278842d6ff4e15467e0b8761c6e1b2a05f926f91.

Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Change-Id: I37f47c137c048ddc3a728e143b6f30be525de120
Reviewed-on: https://git-master.nvidia.com/r/1918622
 2018-10-12 17:35:09 +05:30
David Gilhooley
b74a4dbd26 Revert "gpu: nvgpu: add turing support" 
This reverts commit 27686d8b56316c7ad772dd91548e91516d59f3b1.

Change-Id: Iebda705858edbd58c10ca3024a4ad060401485b6
Signed-off-by: David Gilhooley <dgilhooley@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1918612
 2018-10-12 17:35:09 +05:30
Deepak Nibade
51244d6112 gpu: nvgpu: add turing support 
Add Turing specific common, unit, hardware header files

Make all the Makefile and Makefile.sources changes to compile
all Turing specific code

Bug 200454999

Change-Id: I62ebff5c078b4b8817fc83ea0e4ee3cfffe668dc
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1917983
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
 2018-10-12 17:35:09 +05:30