Thomas Fleury
c270bb73ae
gpu: nvgpu: rename syncpt and sema HALs
...
Renamed the following HALs
- syncpt.alloc_syncpt_buf -> syncpt.alloc_buf
- syncpt.free_syncpt_buf -> syncpt.free_buf
- syncpt.add_syncpt_wait_cmd -> syncpt.add_wait_cmd
- syncpt.get_syncpt_wait_cmd_size -> syncpt.get_wait_cmd_size
- syncpt.get_syncpt_incr_per_release -> syncpt.get_incr_per_release
- syncpt.add_syncpt_incr_cmd -> syncpt.add_incr_cmd
- syncpt.get_syncpt_incr_cmd_size -> syncpt.get_incr_cmd_size
- syncpt.get_sync_ro_map -> syncpt.get_sync_ro_map
- sema.get_sema_wait_cmd_size -> sema.get_wait_cmd_size
- sema.get_sema_incr_cmd_size -> sema.get_incr_cmd_size
- sema.add_sema_cmd -> sema.add_cmd
Renamed HAL implementations as:
- gk20a_alloc_syncpt_buf -> gk20a_syncpt_alloc_buf
- gk20a_free_syncpt_buf -> gk20a_syncpt_free_buf
- gk20a_add_syncpt_wait_cmd -> gk20a_syncpt_add_wait_cmd
- gk20a_get_syncpt_wait_cmd_size -> gk20a_syncpt_get_wait_cmd_size
- gk20a_get_syncpt_incr_per_release -> gk20a_syncpt_get_incr_per_release
- gk20a_add_syncpt_incr_cmd -> gk20a_syncpt_add_incr_cmd
- gk20a_get_syncpt_incr_cmd_size -> gk20a_syncpt_get_incr_cmd_size
- gv11b_alloc_syncpt_buf -> gv11b_syncpt_alloc_buf
- gv11b_free_syncpt_buf -> gv11b_syncpt_free_buf
- gv11b_add_syncpt_wait_cmd -> gv11b_syncpt_add_wait_cmd
- gv11b_get_syncpt_wait_cmd_size -> gv11b_syncpt_get_wait_cmd_size
- gv11b_add_syncpt_incr_cmd -> gv11b_syncpt_add_incr_cmd
- gv11b_get_syncpt_incr_cmd_size -> gv11b_syncpt_get_incr_cmd_size
- gv11b_get_syncpt_incr_per_release -> gv11b_syncpt_get_incr_per_release
- gv11b_get_sync_ro_map -> gv11b_syncpt_get_sync_ro_map
- gk20a_get_sema_wait_cmd_size -> gk20a_sema_get_wait_cmd_size
- gk20a_get_sema_incr_cmd_size -> gk20a_sema_get_incr_cmd_size
- gk20a_add_sema_cmd -> gk20a_sema_add_cmd
- gv11b_get_sema_wait_cmd_size -> gv11b_sema_get_wait_cmd_size
- gv11b_get_sema_incr_cmd_size -> gv11b_sema_get_incr_cmd_size
- gv11b_add_sema_cmd -> gv11b_sema_add_cmd
Jira NVGPU-1984
Jira NVGPU-1986
Change-Id: I3eb3f669093588df422a82c54fa1ca64788a490c
Signed-off-by: Thomas Fleury <tfleury@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2096374
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
2019-04-16 10:46:32 -07:00
Adeel Raza
d828e013db
gpu: nvgpu: common: MISRA rule 15.6 fixes
...
MISRA rule 15.6 requires that all if/else/loop blocks should be enclosed
by brackets. This patch adds brackets to single line if/else/loop blocks
in the common directory.
JIRA NVGPU-775
Change-Id: I0dfb38dbf256d49bc0391d889d9fbe5e21da5641
Signed-off-by: Adeel Raza <araza@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2011655
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com >
Reviewed-by: Scott Long <scottl@nvidia.com >
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com >
Reviewed-by: Alex Waterman <alexw@nvidia.com >
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com >
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
2019-02-05 19:23:47 -08:00
Debarshi Dutta
ebe6fa7fac
gpu: nvgpu: move syncpt specific cmdbuf methods to common/sync/
...
syncpt cmdbuf specific functions are only for the sync functionality of
nvgpu and donot belong to fifo.
construct files syncpt_cmdbuf_gk20a.h and syncpt_cmdbuf_gk20a.c under
common/sync to contain the syncpt specific cmdbuf functions for arch
gk20a.
The word 'fifo' is also removed from the name of these functions.
Jira NVGPU-1308
Change-Id: I1a1fd1d31f7decd1398f8e2ff625f95cf1f55033
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1975920
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
2019-01-25 02:45:40 -08:00
