3 Commits

Author	SHA1	Message	Date
Amurthyreddy	23f35e1b2f	gpu: nvgpu: MISRA 14.4 bitwise operation as boolean ... MISRA rule 14.4 doesn't allow the usage of integer types as booleans in the controlling expression of an if statement or an iteration statement. Fix violations where the result of a bitwise operation is used as a boolean in the controlling expression of if and loop statements. JIRA NVGPU-1020 Change-Id: I6a756ee1bbb45d43f424d2251eebbc26278db417 Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1936334 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2018-11-13 09:45:25 -08:00
Scott Long	9834fb40fe	gpu: nvgpu: nvgpu_memcpy changes to acr code ... MISRA Rule 21.15 prohibits use of memcpy() with incompatible ptrs to qualified/unqualified types. To circumvent this issue we've introduced a new MISRA-compliant nvgpu_memcpy() function. This change switches non-offending memcpy usage in acr code over to to use nvgpu_memcpy() with appropriate casts applied to maintain consistency within nvgpu. JIRA NVGPU-849 Change-Id: I55bca75b816d103d70d5825ffa633f64d9379add Signed-off-by: Scott Long <scottl@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1946267 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2018-11-12 22:33:48 -08:00
Terje Bergstrom	f00d9ca1aa	gpu: nvgpu: Move pmu HAL files to common/pmu ... Move PMU and ACR HAL source code files to live under common/pmu. Also update the #include paths and delete unnecessary #include dependencies. JIRA NVGPU-961 Change-Id: I29a220bce6de0a46b6a5fe8ff7f9dc4d67395348 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1935626 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2018-11-08 20:04:06 -08:00