Commit Graph

8 Commits

Author SHA1 Message Date
Konsta Holtta
5991f6b856 gpu: nvgpu: pass gr_ctx to map_global_ctx_buffers
Simplify object ownership by passing the gr_ctx around directly instead
of reading from tsg via a channel; the caller holds the gr_ctx already.
Also pass the channel vm and vpr flag instead of the whole channel as
only those are needed.

Jira NVGPU-1149

Change-Id: Ic0921ccaf65f208105b25f08f8d7b581a56b40fe
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1925431
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-11-23 04:32:28 -08:00
Konsta Holtta
ca632a2e66 gpu: nvgpu: pass gr_ctx to commit_global_ctx_buffers
Simplify object ownership by passing the gr_ctx around directly instead
of reading from tsg via a channel; the caller holds the gr_ctx already.

Jira NVGPU-1149

Change-Id: I710afc48c0ed11b727cc1b9b6f440110aa404693
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1925430
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-11-23 04:32:19 -08:00
smadhavan
757f028320 gpu: nvgpu: MISRA Rule 21.2 header guard fixes
MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations by renaming them
to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when there
is no keyword repetition between file name and directory or
'NVGPU_HEADER-NAME' when there is repetition.

Deviate from the convention mentioned earlier in the case of clk.h.
There are two files with name clk.h. One under include/nvgpu directory
and other on in clk/ directory. Both of them will have header guards
with name NVGPU_CLK_H under the convention. Thus clk/clk.h will have
header guard with name NVGPU_CLK_CLK_H and include/nvgpu/clk will have
header guard with name NVGPU_INCLUDE_CLK_H

JIRA NVGPU-1028

Change-Id: I386d39649f39a98019a9e06bc65c8b623a43629b
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1923539
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-29 03:57:01 -07:00
Akash Goel
e3653e7b5e gpu: nvgpu: tu104: remove smpc extended buffer workaround
In Turing, SMPC gets fe2all_freeze, so extended buffer workaround
is not needed. This workaround has been removed from Ucode, but
not from kernel, this causes smpc counters to either not start or
not stop in some cases.

Bug 2420353

Change-Id: Idb0ddbc4488031b78678adeccb6d77d1b28e0c70
Signed-off-by: akgoel <akgoel@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1931362
(cherry picked from commit 00d813d0a04ce77a18801a1adf8733a52ba769f0)
Reviewed-on: https://git-master.nvidia.com/r/1932436
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-24 17:01:48 -07:00
Vinod G
9e2d3cce1e gpu: nvgpu: tu104: Support QUAD derivative for 2D
Add support for NV_PTPC_PRI_SM_DISP_CTRL_
COMPUTE_SHADER_QUAD register programming for
graphics

JIRA NVGPUT-135

Change-Id: If0afbf679069eb94ea4d56f8d62c2f21eaee6cf0
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1928524
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-24 17:00:55 -07:00
Terje Bergstrom
3bda3a0678 Revert "Revert "gpu: nvgpu: add turing support""
This reverts commit 278842d6ff4e15467e0b8761c6e1b2a05f926f91.

Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Change-Id: I37f47c137c048ddc3a728e143b6f30be525de120
Reviewed-on: https://git-master.nvidia.com/r/1918622
2018-10-12 17:35:09 +05:30
David Gilhooley
b74a4dbd26 Revert "gpu: nvgpu: add turing support"
This reverts commit 27686d8b56316c7ad772dd91548e91516d59f3b1.

Change-Id: Iebda705858edbd58c10ca3024a4ad060401485b6
Signed-off-by: David Gilhooley <dgilhooley@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1918612
2018-10-12 17:35:09 +05:30
Deepak Nibade
51244d6112 gpu: nvgpu: add turing support
Add Turing specific common, unit, hardware header files

Make all the Makefile and Makefile.sources changes to compile
all Turing specific code

Bug 200454999

Change-Id: I62ebff5c078b4b8817fc83ea0e4ee3cfffe668dc
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1917983
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2018-10-12 17:35:09 +05:30