Commit Graph

5 Commits

Author SHA1 Message Date
Seshendra Gadagottu
4faeea63aa gpu: nvgpu: create class unit
Created class unit under hal and moved all valid class check related
functionality to this unit. Moved all class defs from gr to a new header
include/nvgpu/class.h.

Moved following hals from gr to newly created class unit:
bool (*is_valid_class)(struct gk20a *g, u32 class_num); -->
		 bool (*is_valid)(u32 class_num);
bool (*is_valid_gfx_class)(struct gk20a *g, u32 class_num); -->
		bool (*is_valid_gfx)(u32 class_num);
bool (*is_valid_compute_class)(struct gk20a *g, u32 class_num); -->
		bool (*is_valid_compute)(u32 class_num);

JIRA NVGPU-3109

Change-Id: I01123e9b984613d4bddb2d8cf23d63410e212408
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2095542
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-13 09:13:48 -07:00
Nitin Kumbhar
8664b3be6c gpu: nvgpu: make ctx structs private
Add ctx_priv.h header for structs which are used within
nvgpu_gr_ctx. APIs are added to manage fields of nvgpu_gr_ctx.

JIRA NVGPU-3060

Change-Id: I396fbbb5199e354c62772e901e3bbf61d135f3b1
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2090398
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-12 04:04:31 -07:00
Deepak Nibade
ad0a7e77be gpu: nvgpu: add common.gr.setup api to set preemptiom modes
Add api nvgpu_gr_setup_set_preemption_mode() in common.gr.setup to
set various preemption modes

Define new hal g->ops.gr.setup.set_preemption_mode() that calls above
common api

Move corresponding code from gr_gp10b.c to common.gr.setup unit

Jira NVGPU-1886

Change-Id: I7cb0187a4809156e5f90f39727a782b17219afa3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2092170
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-10 09:28:43 -07:00
Deepak Nibade
f5c093d47e gpu: nvgpu: add common.gr.setup apis to allocate/free context
Add below apis in common.gr.setup to allocate/free context
nvgpu_gr_setup_alloc_obj_ctx()
nvgpu_gr_setup_free_gr_ctx()

Define two new hals
g->ops.gr.setup.alloc_obj_ctx()
g->ops.gr.setup.free_gr_ctx()

Move corresponding code from gr_gk20a.c to common.gr.setup unit

Jira NVGPU-1886

Change-Id: Icf170a6ed8979afebcedaa98e3df1483437b427b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2092169
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-10 09:28:28 -07:00
Deepak Nibade
0e909daf1a gpu: nvgpu: add common.gr.setup unit
Add new unit common.gr.setup that provides runtime setup interfaces to
other units outside of GR unit or to OS-specific code

Move zcull setup call to this unit.
New unit now exposes nvgpu_gr_setup_bind_ctxsw_zcull() to setup zcull
This API internally calls common.gr.zcull API nvgpu_gr_zcull_ctx_setup()

Add new hal g->ops.gr.setup.bind_ctxsw_zcull() and remove
g->ops.gr.zcull.bind_ctxsw_zcull()

Remove nvgpu_channel_gr_zcull_setup() from channel unit
Also remove ctx/subctx header includes sicne channel code need not
configure zcull

Remove gm20b_gr_bind_ctxsw_zcull() since binding is done from common
code

Jira NVGPU-1886

Change-Id: I6f04d19a8b8c003734702c5f6780a03ffc89b717
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2086602
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-01 11:06:32 -07:00