Commit Graph

30 Commits

Author SHA1 Message Date
Adeel Raza
f03ee50232 gpu: nvgpu: gp10b: only create ECC stats once
The ECC sysfs stat creation function is called on GR init. GR can get
initialized multiple times but we only need to create the ECC stats
once. Therefore, add a check to avoid creating duplicate stat sysfs
nodes.

Change-Id: Ifb338e57643f2f15492df137d2a7521e0c990cf2
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/1021660
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:11 +05:30
Amit Sharma
63d463c1ac gpu: nvgpu: gp10b: make local symbol static
Fixed the following sparse warning by making local symbol static:
- platform_gp10b_tegra.c:365: warning: symbol 'ecc_hash_table' was not declared.
                                       Should it be static?

Bug 200088648

Change-Id: Iea1a682c3ee0609730366d44fab91849cd59c9ad
Signed-off-by: Amit Sharma <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/1022410
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>
2016-12-27 15:22:11 +05:30
Seshendra Gadagottu
6ce874a30c Revert "Revert "gpu: nvgpu: gp10b: enable gpu rail gating""
This reverts commit 7c1f6f0b2998c354f315b431e00f3c8f861cb190.

Bug 200176691

Change-Id: Ia546513ec5c61999f6eb4d56ccd7e45ae072167c
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1020813
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:10 +05:30
Supriya
640d0e2c3b gpu: nvgpu: ECC override
-sysfs functions to call into LS PMU and modify
 ECC overide register

Bug 1699676

Change-Id: Iaf6cc3a86160b806e52ab168577caad42b2c5d22
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/921252
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:10 +05:30
Prashant Gaikwad
02ee4d4188 Revert "gpu: nvgpu: gp10b: enable gpu rail gating"
This reverts commit 71b59d75fc49e2159830026bce387ef4d829faa8
since it causes suspend_sanity to fail on quill platform.

On system resume, we see the following error dump from GPU

gk20a 17000000.gp10b: gk20a_channel_timeout_handler: Job on channel 501 timed out

gk20a 17000000.gp10b: gk20a_fifo_set_ctx_mmu_error_ch: channel 501 generated a mmu fault
gk20a 17000000.gp10b: gk20a_set_error_notifier: error notifier set to 31 for ch 501
gk20a 17000000.gp10b: gk20a_channel_timeout_handler: Job on channel 509 timed out

Change-Id: I61bc3b0745fe136675ab79b13f54e9126602f51c
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/1017967
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-12-27 15:22:10 +05:30
Seshendra Gadagottu
cdf3fdd63b gpu: nvgpu: gp10b: enable gpu rail gating
Bug 1698618

Change-Id: Iabfd726891165d7879376ab96445b7b81b907153
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/841856
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:10 +05:30
Mahantesh Kumbar
6ad20e9004 gpu: nvgpu: gp10b: Enable adaptive ELPG
ELPG is enabled on TOT.

Bug 200144583

Change-Id: Icbdcb5f575a4ca37becf47b098fbd6a1f89feec7
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1013845
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:10 +05:30
Adeel Raza
e9b03e903c gpu: nvgpu: gp10b: add ECC stats sysfs nodes
Add sysfs nodes for querying ECC single/double bit error counts.

Bug 1699676

Change-Id: I6d5219facadaa17207ac759b88fe19077207d8f1
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/935363
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:10 +05:30
Seshendra Gadagottu
acc62a236f gpu: nvgpu: gp10b: enable power gating
Enable engine level power gating(elpg)

Bug 200144583

Change-Id: I66f3be841625c2c9e07cafbf19af8f1dbdbfd390
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/818637
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:10 +05:30
Seshendra Gadagottu
1cde817120 gpu: nvgpu: t18x: make gp10b_freq_table static
Make gp10b_freq_table static to fix sparse warning

Bug 200088648

Change-Id: Ibaaabd145e37685e049ac3a49e2b276fb6545d0e
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/837421
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:09 +05:30
Seshendra Gadagottu
1146dbae18 gpu: nvgpu: gp10b: add support for freq scaling
Add support for gp10b freq scaling.

Bug 200147662

Reviewed-on: http://git-master/r/816962
(cherry picked from commit 62de7dba758e46ee80c896dcfcbccb0f8b979438)

Change-Id: I71ddfa394d490c002761d2a8bbb95090a4c0e799
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/834758
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:09 +05:30
Seshendra Gadagottu
ac335e6fb5 gpu: nvgpu: gp10b: correct initial gpcclk rate
Set initial gpcclk rate to 1GHz.

Bug 200151332

Reviewed-on: http://git-master/r/834113
(cherry picked from commit 9ed69164da7afeec20c3a557885f74db4cbea9cb)

Change-Id: I85107eb5852b25977b30663f6ae173b271ecafeb
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/834322
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:09 +05:30
Terje Bergstrom
1dde902b50 Revert "gpu: nvgpu: gp10b: Force always SMMU bypass"
This reverts commit cc9bd2dc24f562e97a87641e7436594fd3b469f2.

Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Change-Id: Ic4493bc7b71a2ebfb49644c91b34222dd15a9be1
Reviewed-on: http://git-master/r/830854
GVS: Gerrit_Virtual_Submit
2016-12-27 15:22:09 +05:30
Seshendra Gadagottu
4ff59992af gpu: nvgpu: gp10b: set ptimer source frequency
Set platform data with ptimer source frequency.
Removed ptimerscaling10x platform data, and use
ptimer source frequency to calculate ptimerscaling
factor.

Reviewed-on: http://git-master/r/819031
(cherry picked from commit 6849603024943184b0463233bedd95934c353663)

Change-Id: I14b0735fcb602cda2e692f6b842a5ecf469ab724
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/827301
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:09 +05:30
Seshendra Gadagottu
242623a0a8 gpu: nvgpu: gp10b: enable clock gating features
Enable clock gating power features: slcg, blcg and elcg

Bug 200144583

Reviewed-on: http://git-master/r/821149
(cherry picked from commit 1980d443c64e6660e3cd41b8908964c07459dcce)

Change-Id: I6ce813552fa57d0fd14dd7ed6a3d9864c88dc58b
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/818636
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:09 +05:30
Deepak Nibade
8d864432f5 gpu: nvgpu: set wdt timeout for gp10b
set platform specific channel watchdog timeout to 5s
for gp10b

Bug 200133289

Change-Id: I4478463e22a8167c2fc1235dd9a80e069a27b47c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/811509
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:08 +05:30
Matt Craighead
6f4d1bb2e7 gpu: nvgpu: gp10b: skip powergate if no BPMP
The powergating APIs only work if the BPMP is running.  Skip
these calls if it's not available, instead of relying on
is_linsim, which doesn't work under all environments.

Change-Id: I34325847b2ebf33c5db2f31111c57d22ed28ef53
Signed-off-by: Matt Craighead <mcraighead@nvidia.com>
Reviewed-on: http://git-master/r/812415
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:08 +05:30
Terje Bergstrom
1ba28cf44d gpu: nvgpu: gp10b: Force always SMMU bypass
Bug 1688709

Change-Id: If778034225dabbd0f9e6ff843ea6f06011c432bd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/807030
(cherry picked from commit 32f03899ca689f6af12760afe04cf4c8e60ebba1)
Reviewed-on: http://git-master/r/808243
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2016-12-27 15:22:08 +05:30
Vijayakumar
c6766cc798 gpu :nvgpu: gp10b: add ptimer scaling factor as 1x
bug 1603226

t18x fixes ptimer bug and ticks at 1ns.

Change-Id: I590c94957c93adf70263f81a0cdfcb8dc913639e
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/799989
(cherry picked from commit 44866e195113b0a44ed2513a81dcaaf079c2a5f1)
Reviewed-on: http://git-master/r/707810
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:08 +05:30
Deepak Nibade
d3c12a335d gpu: nvgpu: implement reset_assert/deassert for gp10b
Implement platform specific reset_assert() and reset_deassert()
calls for gp10b

These APIs will in turn will use reset_control APIs to do
their work

Also, set force_reset_in_do_idle = true for gp10b, since
railgating is not supported yet

Bug 200137963

Change-Id: I2c0fe1273d3ecfd0c46704a44374712052ff51d6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/797150
(cherry picked from commit 6ac04ca84cee8a4d3b089678c81534799880712d)
Reviewed-on: http://git-master/r/808240
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:08 +05:30
Mahantesh Kumbar
e51dfa9d61 gpu: nvgpu: gp10b: Use clock API to enable clocks
Use CCF to enable GPU clocks. Keep an extra reference to prevent
runtime PM callbacks from disabling clocks while GPU is powered up.

Bug 1673672

Change-Id: I8c34be5ec338fedea62aa3e05bd6bed0513bf1b6
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/788814
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-on: http://git-master/r/785265
2016-12-27 15:22:07 +05:30
Kirill Artamonov
3b08d73568 gpu: nvgpu: gp10b: add debug features for gfxp and cilp
Add debugfs switch to force cilp and gfx preemption
Add debugfs switch to dump context switch stats on channel
destruction.

bug 1525327
bug 1581799

Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Change-Id: I7d0558cc325ce655411388ea66ad982101f2fe66
Reviewed-on: http://git-master/r/794976
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/677231
2016-12-27 15:22:07 +05:30
Mahantesh Kumbar
3e3d83aff1 gpu: nvgpu: enable gp10b rail calls to bpmp
Bug 200086985

Change-Id: I9eaa135b96629636a6b949ae1e3874dd3abd5138
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/794723
Reviewed-on: http://git-master/r/743217
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:07 +05:30
Terje Bergstrom
648c097b96 gpu: nvgpu: gp10b: Define VPR allocator
VPR allocator needs to be used when allocating graphics context for
VPR channels. Define it for gp10b.

Bug 1625090

Change-Id: Ie2e3a865c310c34c629627891ac0b579f299983f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/737846
Reviewed-by: Automatic_Commit_Validation_User
2016-12-27 15:22:05 +05:30
Terje Bergstrom
b5fd6e4fd5 gpu: nvgpu: gp10b: Enable SMMU bypass
Change-Id: I1fcc7e93d3e31bfbb5d540b43b655566f6dc13cd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/732010
2016-12-27 15:22:05 +05:30
Jussi Rasanen
1214aabe95 gpu: nvgpu: enable CDE for t18x
Mark CDE as supported on t18x.

Change-Id: I03c23178712b9018137edddfa8e1ff3a2ad9106c
Signed-off-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-on: http://git-master/r/672384
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:03 +05:30
Terje Bergstrom
0cb992afd7 gpu: nvgpu: gp10b: Default page size 64kB
Set default big page size to 64kB.

Bug 1592495

Change-Id: Id23dac012cde75f2809a49779e1a1cee879d08a0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/671705
2016-12-27 15:22:03 +05:30
Mahantesh Kumbar
5452d16154 gpu: nvgpu: gp10b: gpmu elpg support
Temporally used gm20b elpg sequencing values for gp10b elpg.

Bug 1525971

Change-Id: Ibffb5180979be9d7ee68cad67cd6f10cf23590c3
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/662517
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:03 +05:30
Terje Bergstrom
951100f636 gpu: nvgpu: Define gp10b big page size
Set default big page size of 128kB.

Bug 1567274

Change-Id: Ie27c6ffa23b8d75ebd21afca267068604fb57f0b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/603498
2016-12-27 15:22:02 +05:30
Terje Bergstrom
0f4da5e118 gpu: nvgpu: Add own platform data to enable host1x
Add gp10b platform data to enable sync point support.

Bug 1572701

Change-Id: Iaf03ecb8fb6b8bf4bb824e2a012c80dfe3f4fcae
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/592099
Reviewed-by: Automatic_Commit_Validation_User
2016-12-27 15:22:02 +05:30