Commit Graph

237 Commits

Author SHA1 Message Date
Thomas Fleury
5dbf0675f4 gpu: nvgpu: unit: add channel setup_bind tests
Add coverage for the following functions:
- nvgpu_channel_setup_bind
- nvgpu_channel_setup_usermode

Jira NVGPU-3480

Change-Id: I0814928851bb42a05402d3e99a66d30bd44cb0e6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129725
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-10 19:45:40 -07:00
Thomas Fleury
0624d908cd gpu: nvgpu: unit: add channel close tests
Add branch coverage for:
- nvgpu_channel_kill
- nvgpu_channel_close

Also, modified gk20a_free_channel as follows:
- use nvgpu_assert to check ch->g (so that it can be tested)
- make sure g is non-NULL before calling nvgpu_get_poll_timeout

Jira NVGPU-3480

Change-Id: Ie1fa231b022da47b9ef9022ae67a6b3d73c28a8b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129724
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-10 19:45:17 -07:00
Thomas Fleury
1eef4eaae5 gpu: nvgpu: unit: add channel open tests
Add unit test for:
- gk20a_channel_open_new

Jira NVGPU-3480

Change-Id: I50d8cef746aa532712c94a3806822f5f0c7f435f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129723
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-10 19:45:03 -07:00
Thomas Fleury
d2d7922411 gpu: nvgpu: unit: add channel setup_sw/cleanup_sw
Add unit test for:
- nvgpu_channel_setup_sw
- nvgpu_channel_cleanup_sw

Jira NVGPU-3480

Change-Id: Ic691b7fa17f97022fd7d4905377f9a348d8ecae8
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129722
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-10 19:44:53 -07:00
Thomas Fleury
7e890f4285 gpu: nvgpu: unit: use 'ret' for return code
Use 'ret' for return code, as 'rc' somehow maps to recovery

Jira NVGPU-3476

Change-Id: Ife862ca5b049044adee69384ee805cd2271c0679
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132490
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-09 22:56:42 -07:00
Thomas Fleury
7ccf26b92c gpu: nvgpu: unit: update required tests
Update required tests with tsg tests.

Jira NVGPU-3476

Change-Id: I116e43bb8b5b2ac3701a638352993ca8dddeeeb0
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131757
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-09 22:56:06 -07:00
Thomas Fleury
f980c859e9 gpu: nvgpu: unit: cover more tsg open branches
Add branch coverage for:
- nvgpu_tsg_alloc_sm_error_states_mem

Jira NVGPU-3476

Change-Id: Ifca5b5f512536c609c11fc317d28704380a73a58
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124514
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-09 22:55:27 -07:00
Thomas Fleury
6602baaf41 gpu: nvgpu: unit: add tsg setup_sw/cleanup_sw coverage
Add unit test for:
- nvgpu_setup_sw
- nvgpu_cleanup_sw

Made nvgpu_tsg_init_support return void, since it cannot fail.

Jira NVGPU-3476

Change-Id: Ifff115e98c097375d7920b79ae9e13657d54a357
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124512
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-09 22:55:18 -07:00
Thomas Fleury
7eb8ea9764 gpu: nvgpu: unit: add tsg abort coverage
Add unit test for:
- nvgpu_tsg_abort

Jira NVGPU-3476

Change-Id: Ie1d93647e8ab239ad0604b04a3d36464b2bedb5b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124515
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-07 03:27:32 -07:00
Thomas Fleury
2b3f005313 gpu: nvgpu: unit: add tsg unbind branch coverage
Updated test to cover test where:
- update runlist fails during unbind
- tsg is aborted
- updated runlist fails during abort

Modified update runlist stub to return -EINVAL depending
on branch combinations.

Added custom pruning function to skip some impossible
combinations of non-final branches.

Jira NVGPU-3476

Change-Id: I23a64085239b4003b73873a984a301476d73d962
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124513
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-07 03:27:23 -07:00
Thomas Fleury
32aa15f9d4 gpu: nvgpu: unit: add tsg enable/disable coverage
Add unit tests for
- g->ops.tsg.enable (gv11b_tsg_enable)
- g->ops.tsg_disable (nvgpu_tsg_disable)

Use an array to allow multiple stubs to store data.

Jira NVGPU-3476

Change-Id: I2afaef6d1ec4d74a05ec6e7952e5ead86c432f3d
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123886
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-07 03:27:13 -07:00
Thomas Fleury
04cf2f1ba6 gpu: nvgpu: unit: add unit_assert helper
Add unit_assert helper to check condition.
In case of failure, the macro reports failed condition as well as
line number, then runs bail out code.

Jira NVGPU-3476

Change-Id: I9971e7fa0337661d46a06dfa05b67a98e3c46eee
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129675
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-07 03:27:04 -07:00
Thomas Fleury
eb380fcbdb gpu: nvgpu: unit: tmake userspace build for tsg
Added tmake userspace build for tsg
Added missing exports for libnvgpu-drv
Added tsg tests to required tests
Re-use fifo init/remove support

Jira NVGPU-3476

Change-Id: I5bcbbf5a9b58e825e1cad6aa5896de7e91fe7400
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128160
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-07 03:26:54 -07:00
Mahantesh Kumbar
b691df5a02 gpu: nvgpu: compile out PMU members & headers for safety
-compile out nvgpu_pmu members which are not required for
safety buid & modified source as required to support same.
-compile out PMU headers include which are not required for
safety code
-Removed unnecessary PMU header includes from some files

JIRA NVGPU-3418

Change-Id: I5364b1b16c46637d229e82745dd2846cb6335a72
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128228
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2019-06-06 06:55:58 -07:00
Nicolas Benech
ce3facb616 gpu: nvgpu: unit: add posix-bug unit
The EXPECT_BUG construct was broken so this new unit will ensure
it does not happen again. It will also indirectly ensure that
BUG() works as intended.

JIRA NVGPU-3562

Change-Id: I09a11d616f37f8689e6f7c86840133410c5eb04e
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126873
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-05 13:35:13 -07:00
Nicolas Benech
9909fa53f9 gpu: nvgpu: unit: fix buddy_allocator mutex handling
A separate bug caused EXPECT_BUG to always return true without actually
calling the corresponding test code. This hid some issues in the buddy
allocator unit where the fini() operation was called several times while
expecting it to call BUG(). Doing so caused the mutex unlock operation to
not be called, which caused a deadlock for all subsequent calls. The fix
is to explicitly release the mutex after each call to fini() that expects
a BUG().

JIRA NVGPU-3562

Change-Id: Ic26058a272c616d2a6052d319f38a4d4dc33ef1c
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126874
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 13:35:03 -07:00
Thomas Fleury
97762279b7 gpu: nvgpu: make nvgpu_init_mutex return void
Make the nvgpu_init_mutex function return void.
In linux case, this doesn't affect anything since mutex_init
returns void.
For posix, we assert() and die if pthread_mutex_init fails.

This alleviates the need to error inject for _every_
nvgpu_mutex_init function in the driver.

Jira NVGPU-3476

Change-Id: Ibc801116dc82cdfcedcba2c352785f2640b7d54f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130538
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-05 10:25:52 -07:00
Alex Waterman
c74b89194d gpu: nvgpu: Fix address space initialization in page_table unit test
Unit tests in page_table were initializing the VM with a kernel_reserved
section that was slightly smaller than expected. Then, when the fixed
alloc to support semaphores was done, the fixed address used was actually
below the start of the kernel address space. As a result this caused an
overflow in the base shift in the buddy allocator responsible for
managing the fixed alloc.

Change-Id: I4e688d418262ac8d9d4b66b46bd32ca5456d95e8
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130433
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Tested-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-05 09:16:43 -07:00
Nicolas Benech
87379d2295 gpu: nvgpu: unit: increase rbtree coverage
This patch increases line and branch coverage in the rbtree unit test
by targeting a number of corner cases in the unlink/rebalancing
routines.

JIRA NVGPU-3392

Change-Id: I3caeca552d5c4c27d4a355c0ce289902621c2ff4
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128048
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-04 13:15:04 -07:00
ajesh
a417da9094 gpu: nvgpu: move UT specific code under a define
Move all unit test specific code in bug unit under the define
__NVGPU_UNIT_TEST__.  With this change the following MISRA violations
in bug unit will be only for UT specific code,
MISRA rule 11.3
MISRA rule 21.4
MISRA rule 21.5

Jira NVGPU-3294

Change-Id: I54d3fc2bb6f1f8bc319443c522cb7036d37368e6
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129285
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-03 12:26:18 -07:00
Philip Elcan
937f2a101a gpu: nvgpu: unit: atomics: increase reliability
The test atomic_cmpxchg_not_atomic_threaded is failing intermittently.
Increase the iterations to try to increase reliability.

NVGPU-2251

Change-Id: Ib585321a28c21d073acac5b7b8509d3af55316b8
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127948
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-03 11:06:06 -07:00
Thomas Fleury
741723e81a gpu: nvgpu: unit: add test module for channel
Add unit test module for channel.
Move re-usable code at units/fifo level.
This included init and remove fifo support.

Added missing exports for libnvgpu-drv

Jira NVGPU-3480

Change-Id: Ibe4b423c3fb032b4add242d6c6dd705e43617b6e
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126662
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-31 18:15:43 -07:00
Nicolas Benech
2e3523482d gpu: nvgpu: userspace: fix missing fault injection flag
While preparing the userspace builds for safety, one flag for
fault injection went missing from the host userspace build. This
patch adds it back so that the compile flags for host are the same
as the ones defined in NV_COMPONENT_CFLAGS for target.

JIRA NVGPU-1246

Change-Id: Ia448622f7000ebd46b3b8a17520e30a4f6ccfed9
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128481
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-31 11:17:50 -07:00
Thomas Fleury
c6d51b20d5 gpu: nvgpu: unit: add unbind channel check_ctx_reload
Add test for nvgpu_tsg_unbind_channel_check_ctx_reload.
Check that force reload is done for other channel in TSG.

Jira NVGPU-3476

Change-Id: I1889442f81f2373127cc6db173a64eff6a07a981
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123884
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-05-31 11:16:22 -07:00
Thomas Fleury
53b82d5a84 gpu: nvgpu: unit: add unbind channel check_hw_state
Add coverage for nvgpu_tsg_unbind_channel_check_hw_state.

Jira NVGPU-3476

Change-Id: Ie1fcea234bb234a757ce4cc3b21d51b7b13c4d03
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123883
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-05-31 11:16:12 -07:00
Thomas Fleury
4fad611cb9 gpu: nvgpu: unit: add tsg bind/unbind coverage
Add coverage for
- nvgpu_tsg_bind_channel
- nvgpu_tsg_unbind_channel

Added pruning mechanism to skip subtests that attempt to test
some branches after a final branch.

Jira NVGPU-3476

Change-Id: I8e9a865055f36bc237a510ff93ab5385d430f5d1
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2121251
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-05-31 11:16:03 -07:00
Thomas Fleury
29fc98550b gpu: nvgpu: unit: add tsg open/release coverage
Added coverage for
- nvgpu_tsg_open
- nvgpu_tsg_release

In order to cover branch combinatorial, a bitmask is used.
For each branch, one bit indicates if the branch is taken or not.
A loop calls the tested function with all combinations.
We could afterwards prune some combinations for branches that
directly exit the function.

Set MM_UNIFIED_MEMORY feature to avoid allocating from vidmem.

Jira NVGPU-3476

Change-Id: If2e82eabfa492b4c9ec727e175f31b53fbb4f5f1
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123156
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-31 11:15:53 -07:00
Alex Waterman
4dbbd8c488 gpu: nvgpu: userspace: disable all non-safe features
Add the ability to override an apparently non-safe profile build
with the safe profile. This let's us force the safety profile build
in the userspace build (make under userspace/) and the tmake build
used for unit testing. Doing this keeps the tmake build closer to
the userspace which helps prevent regressions in the userspace
build as it has no direct GVS coverage.

Change-Id: I00c000086aabf6a70b74cf5e052c80520653546a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123833
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-30 17:06:01 -07:00
Alex Waterman
c28546d545 gpu: nvgpu: Remove `-v' from unit.sh on L4T
When running the unit tests on an L4T target in GVS the `-v' argument
is specified in the unit test framework. This results in many megabytes
of text logs getting dumped by the pd_cache tests. These logs consist
of seemingly endless:

  02:00     5: 00:55    27: nvgpu: gpu.USS       nvgpu_pd_cache_alloc_direct:165  [DBG ]  PD-Alloc [D] 4096 bytes
  02:00     5: 00:55    27: nvgpu: gpu.USS       nvgpu_pd_cache_alloc_direct:165  [DBG ]  PD-Alloc [D] 4096 bytes
  02:00     5: 00:55    27: nvgpu: gpu.USS       nvgpu_pd_cache_alloc_direct:165  [DBG ]  PD-Alloc [D] 4096 bytes
  02:00     5: 00:55    27: nvgpu: gpu.USS       nvgpu_pd_cache_alloc_direct:165  [DBG ]  PD-Alloc [D] 4096 bytes

This isn't very useful for debugging and generally clogs this log to
a point where finding error messages is really time consuming.

Change-Id: Idd0ee1bba7426448ed88f825344f7eddcb6b90ef
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127436
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-30 11:25:57 -07:00
Deepak Nibade
790cb6336e gpu: nvgpu: rename gv100 fuse unit test to tu104
gv100 is getting deprecated and hence rename gv100 fuse unit tests
and other support to tu104 dGPU

Bug 200496768

Change-Id: I7add2aee7d7ae2bb8552e6c14cfc292393ad407d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2125840
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-29 07:22:07 -07:00
Thomas Fleury
0a2bac5974 gpu: nvgpu: unit: add io callbacks for tegra fuses
Remove WAR to set FMODEL during gv11b_init_hal.
Instead, add io callbacks for tegra fuses, and return
GCPLEX_CONFIG_WPR_ENABLED_MASK for FUSE_GCPLEX_CONFIG_FUSE_0.

Jira NVGPU-3476

Change-Id: I0739d66668b0f5c6658346b67bc368682edda4da
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120680
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-24 19:05:47 -07:00
Thomas Fleury
77a5d43365 gpu: nvgpu: unit: add USERMODE reg space
Added pre-populated register space for gv11b:
- NV_USERMODE 0x0081FFFF:0x00810000

Added clean up in case of failure when registering
gv11b register spaces.

Jira NVGPU-3476

Change-Id: Iee5790390a4b91f2f7440305d10177c890f12154
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2121252
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-24 19:05:38 -07:00
Thomas Fleury
7b3950f224 gpu: nvgpu: unit: add FUSE reg space
Added pre-populated register space for gv11b:
- NV_FUSE 0x00021fff:0x00021000

Registers values were captured for Xavier on DDPX platform,
using reg_dump, after disabling railgating and ELPG.

Jira NVGPU-3476

Change-Id: Ic96f06501c3e903aef7ed635a88005332758bbb6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120663
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-24 19:05:29 -07:00
Thomas Fleury
12db97bd5c gpu: nvgpu: unit: add MASTER, CCSR and PBDMA reg spaces
Added pre-populated register spaces for gv11b:
- NV_PCCSR 0x0080FFFF:0x00800000
- NV_PMC 0x00000FFF:0x00000000
- NV_PPBDMA 0x0005FFFF:0x00040000

Registers values were captured for Xavier on DDPX platform,
using reg_dump, after disabling railgating and ELPG.

Also added missing reg space unregistration for NV_TOP.

Jira NVGPU-3476

Change-Id: I8745f820819c1201846472602d7ef1872583ef4e
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120657
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-24 19:05:20 -07:00
Thomas Fleury
20d611b081 gpu: nvgpu: unit: move gv11b reg spaces to unit/fifo
Move gv11b reg spaces initializations to unit/fifo, so that
it can be re-used by all fifo sub-units.

Jira NVGPU-3476

Change-Id: I9dd8564e71cb1b4c90a6a7df856e6eeadfedc649
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120585
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-24 19:05:11 -07:00
Deepak Nibade
f4a040cc9d gpu: nvgpu: add safety flag for cyclestats support
Add new flag NVGPU_CYCLESTATS_SUPPORT to compile cyclestats support
in safety builds

This flag is now enabled until whole debugger support is disabled

Jira NVGPU-3504

Change-Id: I5bf8e0d8eb6e58bebe04eff691a756517017c6d8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123621
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-24 11:16:23 -07:00
Sagar Kamble
8a7770dbe5 gpu: nvgpu: skip gv100 fuse unit tests on safety build
Since DGPU support is not available in safety build now let us skip
the gv100 fuse unit tests on that build using CONFIG_DGPU_SUPPORT.
Remove these tests from required_tests.json as well.

JIRA NVGPU-3062

Change-Id: I7ec7cd1164af8c44d798f8906aa0be89f480dca2
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120275
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-23 10:07:41 -07:00
Sagar Kamble
96268cb631 gpu: nvgpu: disable nvlink support in safety build
Since nvlink support is not required for initial safety release, disable
corresponding functionality.
nvgpu_mss_nvlink_init_credits defn. and call is now compiled out using
CONFIG_TEGRA_NVLINK config option.

JIRA NVGPU-3062

Change-Id: I402ed123f07f96125d640fb340957da4828d714a
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2119584
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-23 10:07:12 -07:00
Debarshi Dutta
47dc0b9ebd gpu: nvgpu: move chip specific channel HAL files to hal/fifo/
Moved the channel HAL files from common/fifo/ to hal/fifo

Jira NVGPU-3248

Change-Id: Ibb85b7c0e71422dbd774a518e4f0bba0b97ef807
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123399
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-23 02:19:47 -07:00
Sagar Kamble
273b9a796e gpu: nvgpu: pass option -lpthread while linking libnvgpu-drv.so
pthread library functions were unresolved while linking hence pass the
parameter -lpthread. Missed to check this earlier.

JIRA NVGPU-3062

Change-Id: I4bc2aff2ed8edd40eb6ab75bdf53c40d53600565
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123263
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-22 03:19:07 -07:00
Sagar Kamble
86ed7ade88 gpu: nvgpu: pass option -Wl,--no-defined while linking libnvgpu-drv.so
make nvgpu host userspace build fail with undefined references.
target builds have this check already.

JIRA NVGPU-3062

Change-Id: I5d6f1bf2a80b5a7dd78c40ff80c684f576572f15
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2122825
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-21 10:36:46 -07:00
Thomas Fleury
1456c788f3 gpu: nvgpu: unit: stub userd.setup_sw
Regular USERD init requires bar1.vm to be initialized
Use a stub in unit tests, since it will be disabled in
safety build anyway.

Jira NVGPU-3476

Change-Id: I9bc3ab8ca1ab578a90dbc66167ee535046faae92
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2122297
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-21 10:36:37 -07:00
Thomas Fleury
e140d72ff8 gpu: nvgpu: unit: add tests for common.fifo.tsg
Added pre-populated register spaces for gv11b:
- NV_PFIFO 0x00003FFF:0x00002000
- NV_PTOP 0x000227FF:0x00022400

Registers values were captured on DDPX with reg_dump,
after disabling railgating and ELPG.

This allows running nvgpu_fifo_init_support, using
gv11b HALs.

Added the following tests:
- test_fifo_init_support
- test_tsg_open
- test_tsg_release
- test_fifo_remove_support

Jira NVGPU-3476

Change-Id: Ia717d9a9d431248635d51d0c265c16c2b6806a95
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120564
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-17 10:46:09 -07:00
Sagar Kamble
7e60cb4bdb gpu: nvgpu: make host nvgpu userspace build safe by default
As we plan to unit test only safety build, build libnvgpu-drv.so and the
tests in the safety config by default for host (make).
Target (tmake) userspace builds are built safe & non-safe for respective
profile qnx builds. Will update umbrella makefile later to filter all
targets out for non-safety profile builds

JIRA NVGPU-3062

Change-Id: Ic98e90f913ea08c746fde37174c473a7d81e3264
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120650
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-17 04:06:09 -07:00
Sagar Kamble
e33cdf8ee7 gpu: nvgpu: include nvgpu common build configs in host Makefile
nvgpu userspace and test builds are prepared for both host/x86 and
target/aarch64. nvgpu common cflags file was included in the
Makefile of target builds. Include it in the host build
Makefile as well.
This makes sure we run the same config of qnx and nvgpu userspace
and test builds for MISRA, Coverage.

nvgpu shared config file defines the make variables and cflags app-
licable to nvgpu common shared by qnx, nvgpu userspace, test builds.
Note that cflags are added to variable NVGPU_COMMON_CFLAGS that need
to be used by the parent Makefile to update corresponding cflags
variable.

JIRA NVGPU-3062

Change-Id: Ia7a879698220f3b73aae3f02416cab28432531e0
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2119319
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-17 04:05:46 -07:00
Philip Elcan
5a0a711464 gpu: nvgpu: fix MISRA 21.2 violation in io.h
MISRA Rule 21.2 prohibits naming functions beginning with double
underscore. So, rename __nvgpu_readl() to nvgpu_readl_impl().

JIRA NVGPU-3361

Change-Id: Ia09a0f57e250fa3934f843671a529ee1b2ac2493
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2118041
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-15 22:29:21 -07:00
Vedashree Vidwans
fb89f656d7 gpu: nvgpu: unit: Update allocator init() function
Replace individual page allocator init function with common
nvgpu_allocator_init() function corresponding the re-arch.

Jira NVGPU-991

Change-Id: Ic244c7570bac7e1cc9c3e88116414fd1ad4b4af3
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2117008
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-15 16:47:33 -07:00
Philip Elcan
bceac52f0b gpu: nvgpu: mm: fix MISRA 4.7 violations in vm.c
This fixes MISRA rule 4.7 violations in the function nvgpu_vm_map(). The
violations were caused by trying to use ERR_PTR() to return error
information. Rather than try to return errors in a pointer, just change
the API to return an int and pass the pointer the arguments.

JIRA NVGPU-3332

Change-Id: I2852a6de808d9203b8c7826e2b8211bab97ccd16
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114027
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-15 09:56:08 -07:00
Sagar Kamble
6c22dc7ea4 gpu: nvgpu: use make flag NV_BUILD_CONFIGURATION_IS_SAFETY
Update the shared config file to use the safety build flag NV_BUILD_
CONFIGURATION_IS_SAFETY instead of NVGPU_REDUCED. With these changes
posix userspace and tests will be built in two configs based on this
flag.

JIRA NVGPU-3062

Change-Id: Iaf34dd1a8f66f2dd3f351365c369ed46a484a257
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2116402
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-14 01:18:38 -07:00
Sagar Kamble
94a8f3ce28 gpu: nvgpu: consolidate the makefile config setup
Since the safety build config options for qnx build are to be adhered
by posix userspace build as well, let us create shared configs file.
Add these config options to unit tests makefile as we would need to
control the tests based on these options and tests also access the
common nvgpu functions.

JIRA NVGPU-3062

Change-Id: I292eca9ac3160eed93485afddf7c30e993e0461c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2116401
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-14 01:17:04 -07:00