Commit Graph

6660 Commits

Author SHA1 Message Date
Thomas Fleury
5dbf0675f4 gpu: nvgpu: unit: add channel setup_bind tests
Add coverage for the following functions:
- nvgpu_channel_setup_bind
- nvgpu_channel_setup_usermode

Jira NVGPU-3480

Change-Id: I0814928851bb42a05402d3e99a66d30bd44cb0e6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129725
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-10 19:45:40 -07:00
Thomas Fleury
0624d908cd gpu: nvgpu: unit: add channel close tests
Add branch coverage for:
- nvgpu_channel_kill
- nvgpu_channel_close

Also, modified gk20a_free_channel as follows:
- use nvgpu_assert to check ch->g (so that it can be tested)
- make sure g is non-NULL before calling nvgpu_get_poll_timeout

Jira NVGPU-3480

Change-Id: Ie1fa231b022da47b9ef9022ae67a6b3d73c28a8b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129724
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2019-06-10 19:45:17 -07:00
Thomas Fleury
1eef4eaae5 gpu: nvgpu: unit: add channel open tests
Add unit test for:
- gk20a_channel_open_new

Jira NVGPU-3480

Change-Id: I50d8cef746aa532712c94a3806822f5f0c7f435f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129723
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-10 19:45:03 -07:00
Thomas Fleury
d2d7922411 gpu: nvgpu: unit: add channel setup_sw/cleanup_sw
Add unit test for:
- nvgpu_channel_setup_sw
- nvgpu_channel_cleanup_sw

Jira NVGPU-3480

Change-Id: Ic691b7fa17f97022fd7d4905377f9a348d8ecae8
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129722
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2019-06-10 19:44:53 -07:00
Vinod G
f4b8feccf5 gpu: nvgpu: Fix CERT INT30-C errors in hal.gr.init unit
Fix CERT INT30-C erros in hal.gr.init units.
Unsigned integer operation may wrap. Use safe_ops macro to fix
the wrap errors.

Jira NVGPU-3585

Change-Id: I1c825decfbfba52136aef55c791e3d328a3470a2
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132617
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Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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2019-06-10 11:34:47 -07:00
Vinod G
0c13e9e8ad gpu: nvgpu: Fix CERT INT30-C errors in common.gr
Fix CERT INT30-C erros in common.gr units

Unsigned integer operation may wrap. Use safe_ops macro
to fix the wrap errors.

Jira NVGPU-3585

Change-Id: I76127d8d58e1b5516370e78432754a7e7091e7be
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132588
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Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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2019-06-10 07:48:58 -07:00
Thomas Fleury
7e890f4285 gpu: nvgpu: unit: use 'ret' for return code
Use 'ret' for return code, as 'rc' somehow maps to recovery

Jira NVGPU-3476

Change-Id: Ife862ca5b049044adee69384ee805cd2271c0679
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132490
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-09 22:56:42 -07:00
Thomas Fleury
7ccf26b92c gpu: nvgpu: unit: update required tests
Update required tests with tsg tests.

Jira NVGPU-3476

Change-Id: I116e43bb8b5b2ac3701a638352993ca8dddeeeb0
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131757
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
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2019-06-09 22:56:06 -07:00
Thomas Fleury
f980c859e9 gpu: nvgpu: unit: cover more tsg open branches
Add branch coverage for:
- nvgpu_tsg_alloc_sm_error_states_mem

Jira NVGPU-3476

Change-Id: Ifca5b5f512536c609c11fc317d28704380a73a58
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124514
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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2019-06-09 22:55:27 -07:00
Thomas Fleury
6602baaf41 gpu: nvgpu: unit: add tsg setup_sw/cleanup_sw coverage
Add unit test for:
- nvgpu_setup_sw
- nvgpu_cleanup_sw

Made nvgpu_tsg_init_support return void, since it cannot fail.

Jira NVGPU-3476

Change-Id: Ifff115e98c097375d7920b79ae9e13657d54a357
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124512
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
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2019-06-09 22:55:18 -07:00
Vinod G
8db47e6f51 gpu: nvgpu: Add utils.h to YAML arch
Move all definitions and functions other than type defines from types.h
to new header utils.h for posix.
Update files that use functions and defintions from utils.h

Jira NVGPU-3411

Change-Id: I6d9b165f882282450d4b35f4d6a0200effe76791
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130529
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
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2019-06-07 17:05:41 -07:00
Vinod G
4201f58e1e gpu: nvgpu: Add utils header for posix
Move all definitions and functions other than type defines from types.h
to new header utils.h for posix.
Update files that use functions and defintions from utils.h

DIV_ROUND_UP macro is updated to use safe_ops.h calls to handle
the CERT-C wrap issues.

Jira NVGPU-3411

Change-Id: I9da3e9f255f39949287c615519f062fd8816aa04
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130453
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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2019-06-07 17:05:23 -07:00
Philip Elcan
60c3be3ca9 gpu: nvgpu: mm: fix CERT-C INT32 violations in page_allocator
CERT-C Rule INT32 requires checking that signed values do not wrap when
doing arithmetic operations. The INT32 violations in page_allocator were
actually unsigned values, so change them to u32 and use safe ops.

JIRA NVGPU-3586

Change-Id: I7c7fbf52c2f55a9d47d86c2b01be0ab222d3d65e
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131160
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-07 09:06:04 -07:00
Philip Elcan
fbbfc9717f gpu: nvgpu: mm: fix CERT-C INT31 violations in page_allocator
CERT-C Rule INT31 requires checking that no data is lost when doing
casts, so use the safe cast operations in page_allocator.c

JIRA NVGPU-3586

Change-Id: I0cf0de7eda0c117a65a08930dbc70f9c699a0219
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131159
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2019-06-07 09:05:55 -07:00
Philip Elcan
0a645e66ee gpu: nvgpu: mm: fix CERT-C violations in page_allocator
CERT-C Rule INT30 requires checking for values wrapping when doing
arithmetic operations on unsigned values. Use the safe ops or asserts to
ensure unsigned arithmetic operations will no wrap.

JIRA NVGPU-3586

Change-Id: Ia1fc05711520135e788023e0614c70778c076f6a
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131158
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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2019-06-07 09:05:46 -07:00
Philip Elcan
be7c7aa040 gpu: nvgpu: posix: make round*_pow_of_two CERT-C friendly
CERT-C Rule INT30 requires checking unsigned arithmetic for potential
wrap. The macros roundup_pow_of_two and rounddown_pow_of_two could
potentially wrap if the passed parameter were 0.

JIRA NVGPU-3586

Change-Id: I9eba4c197b74db555055e1199ce72131b071062c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131157
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
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2019-06-07 09:05:37 -07:00
Thomas Fleury
7eb8ea9764 gpu: nvgpu: unit: add tsg abort coverage
Add unit test for:
- nvgpu_tsg_abort

Jira NVGPU-3476

Change-Id: Ie1d93647e8ab239ad0604b04a3d36464b2bedb5b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124515
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2019-06-07 03:27:32 -07:00
Thomas Fleury
2b3f005313 gpu: nvgpu: unit: add tsg unbind branch coverage
Updated test to cover test where:
- update runlist fails during unbind
- tsg is aborted
- updated runlist fails during abort

Modified update runlist stub to return -EINVAL depending
on branch combinations.

Added custom pruning function to skip some impossible
combinations of non-final branches.

Jira NVGPU-3476

Change-Id: I23a64085239b4003b73873a984a301476d73d962
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124513
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2019-06-07 03:27:23 -07:00
Thomas Fleury
32aa15f9d4 gpu: nvgpu: unit: add tsg enable/disable coverage
Add unit tests for
- g->ops.tsg.enable (gv11b_tsg_enable)
- g->ops.tsg_disable (nvgpu_tsg_disable)

Use an array to allow multiple stubs to store data.

Jira NVGPU-3476

Change-Id: I2afaef6d1ec4d74a05ec6e7952e5ead86c432f3d
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123886
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2019-06-07 03:27:13 -07:00
Thomas Fleury
04cf2f1ba6 gpu: nvgpu: unit: add unit_assert helper
Add unit_assert helper to check condition.
In case of failure, the macro reports failed condition as well as
line number, then runs bail out code.

Jira NVGPU-3476

Change-Id: I9971e7fa0337661d46a06dfa05b67a98e3c46eee
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2129675
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2019-06-07 03:27:04 -07:00
Thomas Fleury
eb380fcbdb gpu: nvgpu: unit: tmake userspace build for tsg
Added tmake userspace build for tsg
Added missing exports for libnvgpu-drv
Added tsg tests to required tests
Re-use fifo init/remove support

Jira NVGPU-3476

Change-Id: I5bcbbf5a9b58e825e1cad6aa5896de7e91fe7400
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128160
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2019-06-07 03:26:54 -07:00
Lakshmanan M
57170db65a gpu: nvgpu: fifo: Call os specific channel open only for kernel mode submit
Restricted the os specific channel open only for kernel mode submit.
For linux, g->os_channel.open is just noop.
For QNX, nvgpu creates the sync point notifier thread for
job tracking. This job completion tracking is only required
for kernel mode submit. This sync point notifier thread
is not required for user mode submit.

JIRA NVGPU-2944

Change-Id: Ie37824aac3609090ef9da378202dbc211a2eb0b3
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131386
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2019-06-06 16:29:50 -07:00
Deepak Nibade
649a2b57a8 gpu: nvgpu: add debugger flag for hal.gr.gr unit
Add NVGPU_DEBUGGER flag for common.hal.gr.gr unit and corresponding
hals.

Also add this flag for deferred reset functionality

Jira NVGPU-3506

Change-Id: Iee4fbc1305346bb4d779cd69e8fd5539cb07206b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130149
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2019-06-06 16:28:44 -07:00
Deepak Nibade
d315f2a7e2 gpu: nvgpu: add debugger flag for perf units
Add NVGPU_DEBUGGER flag for common.gr.perfbuf and common.hal.gr.perf
units

Jira NVGPU-3505

Change-Id: Ic01324304114e3fbaf018fd3bd892ccaa655b9ae
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130148
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2019-06-06 16:28:29 -07:00
Deepak Nibade
c5f5eb896c gpu: nvgpu: add debugger flag for hwpm_map units
Add NVGPU_DEBUGGER flag for common.gr.hwpm_map and
common.hal.gr.hwpm_map units

Jira NVGPU-3505

Change-Id: I5c9b6f98c7a8f536f5a8492febaa6140ef2adb6f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130147
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2019-06-06 16:28:14 -07:00
Deepak Nibade
455b0da253 gpu: nvgpu: add debugger flag for regops support
Add NVGPU_DEBUGGER flag for regops API and hals

Jira NVGPU-3505

Change-Id: I9f2b850c881bf05f8ba5b6ef1f59f0d73a948cde
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130146
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2019-06-06 16:27:58 -07:00
Alex Waterman
3d318e1d1d gpu: nvgpu: Move PTE size computation to VM
Move the PTE size computation from MM to VM where it belongs. This
function is only ever used in vm.c so move it there and make it
static.

This is part of the broader effort to cleanup the top level unit
header files and only expose functions needed by other units in the
top level unit header files.

JIRA NVGPU-3544

Change-Id: Ifd8ed36723eb62e19a7e6563ef52dc9c3adb3f52
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128075
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
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2019-06-06 16:27:43 -07:00
ajesh
74782201ee gpu: nvgpu: fix MISRA violation in threads unit
MISRA directive 4.7 states that if a function returns error
information, then that error information shall be tested.  Fix
violation of Dir 4.7 in threads unit

Jira NVGPU-3290

Change-Id: Ibafc6f525de2c73d972ed2e60b21f44727ca5807
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126416
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-06 16:27:33 -07:00
Nitin Kumbhar
0fcd58b3f6 gpu: nvgpu: posix: fix ARR30 CERT C violation
Add checks for type before indexing log_types.

Error: CERT ARR30-C:
drivers/gpu/nvgpu/os/posix/log.c:63:
cert_violation: "log_types[type]" evaluates to an
address that could be at negative offset of an array.

Jira NVGPU-3560

Change-Id: I7ffe9bb2e12be6eea465618e4860697862ee1845
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2122867
Reviewed-by: Automatic_Commit_Validation_User
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GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-06 16:27:23 -07:00
Nitin Kumbhar
69331cdfb7 gpu: nvgpu: posix: fix EXP32 CERT C violation
Do not ignore volatile attribute of addr while assigning it to p.

Error: CERT EXP32-C:
drivers/gpu/nvgpu/os/posix/bitmap.c:227:
cert_violation: Access volatile variable "addr" through
 a nonvolatile reference.

Jira NVGPU-3560

Change-Id: I202b143e1818641b12f6552810953ac447348271
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2122720
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-06 16:27:13 -07:00
Nitin Kumbhar
97a4a76936 gpu: nvgpu: posix: fix MEM31 CERT C violation
Fix memory leak which happens if a subsequent memory allocation fails
in the loop.

Error: CERT MEM31-C:
drivers/gpu/nvgpu/os/posix/posix-nvgpu_mem.c:146:
cert_violation: Variable "head" going out of scope leaks
 the storage it points to.

Jira NVGPU-3560

Change-Id: I82084d5402dc22c924f3864b7ddf50f03ff8a41e
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2122690
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-06 16:26:58 -07:00
Nitin Kumbhar
e0061b8daa gpu: nvgpu: fix sim STR30 CERT C violations
Make path a pointer to const char to avoid attempt to
modify string literal.

Error: CERT STR30-C:
drivers/gpu/nvgpu/common/sim/sim_netlist.c:363:
cert_violation: Assigning or casting string literal
 ""GRCTX_GEN_CTX_REGS_BASE_INDEX"" to a pointer to non-const.

Jira NVGPU-3560

Change-Id: I22dacbbd210a43c41aef2532c5ddb1429d5c9153
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2122101
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-06 16:26:48 -07:00
Sagar Kamble
16a3929680 gpu: nvgpu: userspace: force the interface exports to safety profile
Currently userspace tmake build is forced as safety build. Hence force
the interface selection also to safety profile. Delete the non-safe
interface exports file.

JIRA NVGPU-1949

Change-Id: I4200d5df569b92d2aa2e0870707325febc97c6da
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130129
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-06 09:05:35 -07:00
Mahantesh Kumbar
b691df5a02 gpu: nvgpu: compile out PMU members & headers for safety
-compile out nvgpu_pmu members which are not required for
safety buid & modified source as required to support same.
-compile out PMU headers include which are not required for
safety code
-Removed unnecessary PMU header includes from some files

JIRA NVGPU-3418

Change-Id: I5364b1b16c46637d229e82745dd2846cb6335a72
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128228
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-06 06:55:58 -07:00
Vinod G
20b974e724 gpu: nvgpu: Add flag to rop_mapping hal function
Add NVGPU_GRAPHICS flag to support the rop_mapping hal function and
files which refer this function.
Use only when this flag is defined.

Jira NVGPU-3584

Change-Id: I49b10bb772306ba20004b3836596ea43cf0e1775
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130649
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-05 22:56:21 -07:00
Vinod G
1ad54446da gpu: nvgpu: Add flag to map_tiles functions
Add NVGPU_GRAPHICS flag to support the nvgpu_gr_config_init_map_tiles
and map_tiles related functions and variables.
Use only when this flag is defined.

Jira NVGPU-3583

Change-Id: Ib31a7445bcc573a127d1902bc19fc2aae9548d0f
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130616
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 22:56:12 -07:00
Philip Elcan
b127d668ab gpu: nvgpu: mm: fix CERT-C INT30 violations in buddy_allocator
Rule INT30 requires checking for unsigned value overflow. Use the safe
arithemetic ops or check with nvgpu_assert() before doing arithmetic
operation.

JIRA NVGPU-3563

Change-Id: I495dae8f9d471db93c0526cd44b7b5a7845aec1e
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128588
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 15:54:53 -07:00
Philip Elcan
fd10f9385f gpu: nvgpu: posix: make ilog2() CERT-C friendly
Add an assert check to ilog2() before subtracting to avoid CERT-C INT30
violation. Rule INT30 requires checking for overflow of signed values.

JIRA NVGPU-3563

Change-Id: Ieff968e6245e61150396746d78d69558f22338af
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128587
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-05 15:54:44 -07:00
Philip Elcan
dcab84e6d7 gpu: nvgpu: mm: check for valid base in buddy_allocator
Add a validity check for the base value passed to
nvgpu_balloc_fixed_buddy_locked(). Without this check, overflow
arithmetic can occur when balloc_base_shift() is called.

JIRA NVGPU-3563

Change-Id: I0194486d4c6d68dc338b8ad59f031007380b49d0
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128586
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 15:54:35 -07:00
Nicolas Benech
73f37a4c8a gpu: nvgpu: posix: fix EXPECT_BUG behavior
Initially, EXPECT_BUG was implemented with a if (!setjmp) which was
semantically incorrect for the setjmp construct and caused a MISRA
violation. Upon fixing the MISRA violation, it was changed to
if (setjmp != 0) which fixed the MISRA violation but made the test
code to never actually run because setjmp will first return 0 during
the init of the jump point. This caused EXPECT_BUG to always return
true as if a BUG() occurred.

In addition, setjmp is relying internally on CPU registers. As a
result, local variables may get clobbered. This mainly happens when
compiler optimizations are enabled (release builds) and the compiler
relies more on registers to hold local variables. In the case of the
EXPECT_BUG statement expression, the variable holding the return value
was incorrectly getting clobbered in some corner cases leading to
false negatives. The easy workaround for this is to declare it as
volatile, which prevents the compiler from only relying on registers
for this variable.

JIRA NVGPU-3562

Change-Id: Ie5e262d630bdd38b22449347a396d4c2cdd3bbe2
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126872
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 13:35:22 -07:00
Nicolas Benech
ce3facb616 gpu: nvgpu: unit: add posix-bug unit
The EXPECT_BUG construct was broken so this new unit will ensure
it does not happen again. It will also indirectly ensure that
BUG() works as intended.

JIRA NVGPU-3562

Change-Id: I09a11d616f37f8689e6f7c86840133410c5eb04e
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126873
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 13:35:13 -07:00
Nicolas Benech
9909fa53f9 gpu: nvgpu: unit: fix buddy_allocator mutex handling
A separate bug caused EXPECT_BUG to always return true without actually
calling the corresponding test code. This hid some issues in the buddy
allocator unit where the fini() operation was called several times while
expecting it to call BUG(). Doing so caused the mutex unlock operation to
not be called, which caused a deadlock for all subsequent calls. The fix
is to explicitly release the mutex after each call to fini() that expects
a BUG().

JIRA NVGPU-3562

Change-Id: Ic26058a272c616d2a6052d319f38a4d4dc33ef1c
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2126874
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-05 13:35:03 -07:00
Thomas Fleury
97762279b7 gpu: nvgpu: make nvgpu_init_mutex return void
Make the nvgpu_init_mutex function return void.
In linux case, this doesn't affect anything since mutex_init
returns void.
For posix, we assert() and die if pthread_mutex_init fails.

This alleviates the need to error inject for _every_
nvgpu_mutex_init function in the driver.

Jira NVGPU-3476

Change-Id: Ibc801116dc82cdfcedcba2c352785f2640b7d54f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130538
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-05 10:25:52 -07:00
Alex Waterman
c74b89194d gpu: nvgpu: Fix address space initialization in page_table unit test
Unit tests in page_table were initializing the VM with a kernel_reserved
section that was slightly smaller than expected. Then, when the fixed
alloc to support semaphores was done, the fixed address used was actually
below the start of the kernel address space. As a result this caused an
overflow in the base shift in the buddy allocator responsible for
managing the fixed alloc.

Change-Id: I4e688d418262ac8d9d4b66b46bd32ca5456d95e8
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130433
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Tested-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-05 09:16:43 -07:00
Rajesh Devaraj
0352bebc07 gpu: nvgpu: fix misra violations in SDL
The patch adds missing parentheses for macros used in SDL. It is required to
address the following misra violation: MISRA C-2012 Rule 20.7 - Macro parameter
expands into an expression without being wrapped by parentheses.

JIRA NVGPU-3180

Change-Id: I70d5359652c6e29814fe17e356dcd5553b498b34
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130260
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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2019-06-04 22:24:56 -07:00
Philip Elcan
591990212a gpu: nvgpu: mm: fix CERT-C ARR38 violation in vm.c
Rule ARR38 requires checking or array ranges passed to library
functions. Fix case where strncpy was potentially called with an
insufficient length.

JIRA NVGPU-3517

Change-Id: I719260e70f53e9e53d4702e146f5a87e68738d06
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127428
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-06-04 15:15:42 -07:00
Philip Elcan
f83447d134 gpu: nvgpu: mm: make num_user_mapped_buffers a u32
The vm object num_user_mapped_buffers was declared as an int. However,
it is an unsigned value. Being a signed value required a cast to
unsigned when calling nvgpu_big_zalloc() which causes a CERT-C INT31
violation. So, avoid the cast and use an unsigned type. And fix related
INT30 violations related to num_user_mapped_buffers as well.

To avoid introducing new MISRA/CERT-C violations, update the upstream
user of these changes, fifo/channel.c and make the equivalent uses of
this value, num_mapped_buffers a u32 as well.

JIRA NVGPU-3517

Change-Id: I6f6d9dfe4a0ee16789b8cd17b908a3f3f9c4a40c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127427
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-04 15:15:33 -07:00
Philip Elcan
e1094c4800 gpu: nvgpu: mm: fix CERT-C INT32 violations in vm.c
Rule INT32 is to prevent overflowing signed integers. In vm.c, change
objects to unsigned as they should never be negative, and make sure they
do not overflow.

JIRA NVGPU-3517

Change-Id: I0dc236d167efb3eaea2c167282017b66583e4cc5
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127426
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-04 15:15:24 -07:00
Philip Elcan
c2bf4a4e8f gpu: nvgpu: mm: fix CERT-C INT31 violations in vm.c
Rule INT31 requires integer conversions do not result in losing or
misinterpreting data. For most cases, use the safe cast operations.

For one case, the conditional operator was being used for s16 values
which were being promoted to ints. So, replace the conditional operator
with an if statement.

JIRA NVGPU-3517

Change-Id: Iac466911b0dd3893e7e7a188e372272b14591b60
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127425
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-04 15:15:15 -07:00
Philip Elcan
23eaac0f33 gpu: nvgpu: mm: fix CERT-C INT30 violations in vm.c
Rule INT30 requires checking that arithmetic operations on unsigned
numbers do no wrap. Use the "safe" ops to comply.

JIRA NVGPU-3517

Change-Id: I21c73d4327289e9b087c44c96b6aa7a3231f1066
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127424
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-04 15:15:05 -07:00