Commit Graph

6 Commits

Author SHA1 Message Date
Seema Khowala
296ff58eb1 gpu: nvgpu: move engine related struct
Move from fifo_gk20a.h to engines.h
fifo_pbdma_exception_info_gk20a
fifo_engine_exception_info_gk20a
fifo_engine_info_gk20a

Rename
fifo_pbdma_exception_info_gk20a -> nvgpu_pbdma_exception_info
fifo_engine_exception_info_gk20a -> nvgpu_engine_exception_info
fifo_engine_info_gk20a -> nvgpu_engine_info
NVGPU_ENGINE_GR_GK20A -> NVGPU_ENGINE_GR
NVGPU_ENGINE_GRCE_GK20A -> NVGPU_ENGINE_GRCE
NVGPU_ENGINE_ASYNC_CE_GK20A -> NVGPU_ENGINE_ASYNC_CE
NVGPU_ENGINE_INVAL_GK20A -> NVGPU_ENGINE_INVAL

JIRA NVGPU-2012

Change-Id: I665487721608ff9eacbdebff17d9dbef653de55e
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109009
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-02 23:39:59 -07:00
Vinod G
8880c82111 gpu: nvgpu: move gk20a_gr_isr to hal
Move gk20a_gr_isr function to stall_isr hal in gr.intr unit.
Move all static functions accessed in gk20a_gr_isr function
to gr_intr file from gr_gk20a file.

Update mc hal functions to use g->ops.gr.intr.stall_isr

JIRA NVGPU-1891
JIRA NVGPU-3016

Change-Id: If379348eef863b8d794a726b98e190ebe8585cb2
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2100670
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-04-20 13:44:02 -07:00
Thomas Fleury
1160f083d4 gpu: nvgpu: move ce code to common/ce and hal/ce
Merged gk20a_ce_delete_context and gk20a_ce_delete_context_priv.

Renamed
- gk20a_init_ce_support -> nvgpu_ce_init_support
- gk20a_ce_destroy -> nvgpu_ce_destroy
- gk20a_ce_suspend -> nvgpu_ce_suspend
- gk20a_ce_create_context -> nvgpu_ce_create_context
- gk20a_ce_delete_context -> nvgpu_ce_delete_context
- gk20a_ce_execute_ops -> nvgpu_ce_execute_ops
- gk20a_ce_prepare_submit -> nvgpu_ce_prepare_submit
- gk20a_ce_put_fences -> nvgpu_ce_put_fences
- gk20a_ce_delete_gpu_context -> nvgpu_ce_delete_gpu_context
- gk20a_ce_get_method_size -> nvgpu_ce_get_method_size
- gk20a_gpu_ctx -> nvgpu_ce_gpu_ctx
- gk20a_gpu_ctx_from_list -> nvgpu_ce_gpu_ctx_from_list
- gk20a_ce_app -> nvgpu_ce_app
- gk20a_ce_debugfs_init -> nvgpu_ce_debugfs_init
- gk20a_get_valid_launch_flags -> nvgpu_ce_get_valid_launch_flags
- gk20a_ce2_isr -> gk20a_ce2_stall_isr
- gp10b_ce_isr -> gp10b_ce_stall_isr
- gv11b_ce_isr -> gv11b_ce_stall_isr

Inlined
- ce*_nonblockpipe_isr
- ce*_blockpipe_isr
- ce*_launcherr_isr

Added ce_priv.h for ce private definitions.

Moved files to common/ce and hal/fifo/ce
- ce2.c -> common/ce2/ce.c
- ce2_gk20a.c -> hal/ce/ce2_gk20a.c
- ce2_gk20a.h -> hal/ce/ce2_gk20a.h
- ce_gp10b.c -> hal/ce/ce_gp10b.c
- ce_gp10b.h -> hal/ce/ce_gp10b.h
- ce_gv11b.c -> hal/ce/ce_gv11b.c
- ce_gv11b.h -> hal/ce/ce_gv11b.h

Updated makefiles and #include directives

Jira NVGPU-1992

Change-Id: Ia6064bf51b7a254085be43a112d056cb6fb6c3b2
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2093503
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-19 13:55:11 -07:00
Seema Khowala
66cb9495a5 gpu: nvgpu: move mmu_fault_pending ops out from mm
Moved
-mmu_fault_pending mm ops to is_mmu_fault_pending mc ops
-mmu_fault_pending fb ops to is_mmu_fault_pending fb.intr ops. This
is needed to check if mmu fault intr is pending for volta onwards.

Added
is_mmu_fault_pending fifo ops. This is needed to check if mmu fault
interrupt is pending for chips prior to volta

JIRA NVGPU-1313

Change-Id: Ie8e778387cd486cb19b18c4aee734c581dcd9229
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2094895
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-11 22:25:01 -07:00
Vinod G
4b433b528e gpu: nvgpu: Move gk20a_gr_nonstall_isr function to hal
Change gk20a_gr_nonstall_isr function to hal under hal.gr.intr

Use nvgpu_gr_gpc_offset and nvgpu_gr_tpc_offset call in
gm20b_gr_intr_handle_tex_exception function.

Update gk20a_gr_nonstall_isr call as g->ops.gr.intr.nonstall_isr

JIRA NVGPU-3016

Change-Id: I9ff39cf1a99bf5b3d215cda6bc68fab1ecae51e3
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2088133
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-03 19:03:59 -07:00
Seema Khowala
f07d933076 gpu: nvgpu: move chip specific mc to hal
Move chip specific mc code from common/mc to hal/mc.
Replace gk20a_readl/writel with nvgpu_readl/writel
Replace 0xFFFFFFFFU with U32_MAX hash define
Change local variable names to fix checkpatch errors/warnings
Change BUG to WARN
Move defines to header files
Create new defines for hard coded delays

JIRA NVGPU-2041

Change-Id: I3594121a81da37ef58c47e87c45e96441e4cf8c7
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2085268
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-02 01:04:44 -07:00