Commit Graph

9936 Commits

Author SHA1 Message Date
Terje Bergstrom
f2e30622a1 gpu: nvgpu: Reload ZBC values on rail gate exit
When exiting rail gate, we reloaded default ZBC values. The correct
behavior is to reload the values.

Bug 1447255

Change-Id: I7aad3586dda91a91a3629062a27001af281b955e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/418346
2015-03-18 12:10:04 -07:00
Terje Bergstrom
6446496902 gpu: nvgpu: On FECS error, dump ARB status
On FECS arbiter timeout, dump ARB status.

Change-Id: I4f8c4d38c99e35ce751172a8695e950f0ce594c8
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/417753
2015-03-18 12:10:04 -07:00
Seshendra Gadagottu
4e9030f34d gpu: nvgpu: update gpmu supported versions
Updated gmpu ucode versions supported for gm20b.
Bug 1514021

Change-Id: If9cbde60449f5cc2b9c39c36ab5c79985d320bf8
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/418479
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:10:04 -07:00
Kevin Huang
7d917f43a5 gpu: nvgpu: gm20b: fix compression sharing
For GM20B alone, the LTC count is already accounted for the HW logic
for the CBC base calculation from the postDivide address. So SW
doesn't have to explicity divide it by the LTC count in the postDivide
address calculation.

Bug 1477079

Change-Id: I558bbe66bbcfb7edfa21210d0dc22c6170149260
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/414264
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:10:03 -07:00
Terje Bergstrom
28c35a1b99 gpu: nvgpu: Fault engines on PBDMA error
On PBDMA error even though the engine might not be wedged, we need to
kick the channel out of engine. Add that logic. Also when channel is
not in engine, we need to remove it from runlist.

Bug 1498688

Change-Id: I5939feb41d0a90635ba313b265c7e3b5d3f48622
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/417682
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
2015-03-18 12:10:03 -07:00
Terje Bergstrom
bcf8c6411c gpu: nvgpu: Remove extraneous FB flush calls
gk20a_mm_fb_flush() invoked G_ELPG_FLUSH and FB_FLUSH. Remove the
invokation of G_ELPG_FLUSH. Replace calls to gk20a_mm_fb_flush() with
gk20a_mm_l2_flush() when appropriate.

Bug 1421824

Change-Id: I02af4bdc3b7bd26d0f6a8d610f70349269775a36
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/408210
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2015-03-18 12:10:03 -07:00
Seshendra Gadagottu
846f0c4f41 gpu: nvgpu: select NETA for gm20b
Bug 1514021
Change-Id: I5bf942245a42881a418eb9e18c148287b6901ca0
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/415531
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>
2015-03-18 12:10:03 -07:00
Dan Willemsen
7e470c49a6 gpu: nvgpu: Create trace events last
Otherwise other trace event headers included may also be created, which
leads to duplicate definition issues in the 3.14 kernel.

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2015-03-18 12:10:01 -07:00
Kevin Huang
18939e4b4a gpu: nvgpu: add support to Maxwell sparse texture
Bug 1442531

Change-Id: Ie927cca905b2ea9811417e7a1fdfdf9d48f015e2
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
2015-03-18 12:09:59 -07:00
Kevin Huang
da56b17de0 gpu: nvgpu: add generic api for sparse memory
Bug 1442531

Change-Id: I97408b54e27f5ed6411792e73f079a6f86cbe5f6
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
2015-03-18 12:09:59 -07:00
Kirill Artamonov
d364553f7c gpu: nvgpu: implement mapping for sparse allocation
Implement support for partial buffer mappings.

Whitelist gr_pri_bes_crop_hww_esr accessed by
fec during sparse texture initialization.

bug 1456562
bug 1369014
bug 1361532

Change-Id: Ib0d1ec6438257ac14b40c8466b37856b67e7e34d
Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-on: http://git-master/r/375012
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:59 -07:00
Terje Bergstrom
5dc7fd0243 gpu: nvgpu: Handle PBDMA errors
Add handling for PBDMA errors.

Bug 1498688

Change-Id: Iff391110db1c270c05c76e6a14b7c666da8e3751
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:59 -07:00
Deepak Nibade
2ad53bb4ca gpu: nvgpu: add is_railgated() callback
Add is_railgated() platform callback to check status
of gk20a power rail

Bug 1376916
Bug 1487804

Change-Id: Ia0d909210dc409ab684eb6f20528b81500aecd5c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2015-03-18 12:09:58 -07:00
Deepak Nibade
cd9f8553ad gpu: nvgpu: sysfs to put gpu into idle
- Add a sysfs "force_idle" to forcibly idle the GPU
- read on this sysfs will return the current status

0 : not in idle (running)
1 : in forced idle state

"echo 1 > force_idle" will force the gpu into idle
"echo 0 > force_idle" will cause the gpu to resume

Bug 1376916
Bug 1487804

Change-Id: I48dfd52e0d14561220bc4baea0776d1bdfaa7ea5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2015-03-18 12:09:58 -07:00
Deepak Nibade
3f7be93dab gpu: nvgpu: add railgate check in do_idle()
In gk20a_do_idle(), check gk20a rail status before returning.
If rail is off, then only return success otherwise return
failure

Bug 1376916
Bug 1487804

Change-Id: I6280bf06c686b8baa4d6f49e90f47148411c3e02
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/415281
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:58 -07:00
Lauri Peltonen
954117fe11 gpu: nvgpu: Support sync framework with semaphores
Add sync_gk20a.c/h that support creating Android sync fence fd's from
gk20a semaphores.

Bug 1445450

Change-Id: I42272996721ceec38ba5510eae6770720bc9dd10
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/374843
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:57 -07:00
Terje Bergstrom
1c9aaa1eaf gpu: nvgpu: Implement ELPG flush for gm20b
ELPG flush is initiated from a common broadcast register, but must be
waited on via per-L2 registers. Split gk20a and gm20b versions of
the flush.

Change-Id: I75c2d65e8da311b50d35bee70308b60464ec2d4d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/401545
Reviewed-by: Automatic_Commit_Validation_User
2015-03-18 12:09:57 -07:00
Terje Bergstrom
24fc5e36a7 gpu: nvgpu: Initialize FECS explicitly on recovery
Instead of calling second phase of PMU boot sequence, initialize FECS
directly.

Change-Id: I7f9de0c5ec42049033839d244979f3f3daabf317
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/410204
2015-03-18 12:09:56 -07:00
Terje Bergstrom
48f0b407f9 gpu: nvgpu: Add gm20b fecs/gpccs bootloader support
Add support for booting FECS and GPCCS via faster bootloader method.
We leave this disabled until the bootloader binaries are checked in.

Change-Id: I39df5d116f7a33486407518c743638b01923970d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/413005
2015-03-18 12:09:56 -07:00
Terje Bergstrom
d78dca61e0 gpu: nvgpu: Remove deferred ELPG enable
Prevent the disable ELPG routine from calling deferred re enablement of
ELPG. Remove code related to deferred ELPG enable..

Change-Id: I9401e6e0f26a4e332e50eb38439e2ef6fcb4225d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/410203
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
2015-03-18 12:09:54 -07:00
Terje Bergstrom
c079c38d75 gpu: nvgpu: Add PMU sent/recvd messages to dbg log
Add debug log entries for received and sent PMU messages.

Change-Id: I94cecca76257d74785c13f1c5f97a7233361019f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/410202
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
2015-03-18 12:09:54 -07:00
Deepak Nibade
ab386e54a5 gpu: nvgpu: gk20a: add do_{idle()/unidle()} APIs
Add below two new APIs for gk20a :

1) gk20a_do_idle()
this API will force GPU to idle and railgate

2) gk20a_do_unidle()
this API will unblock all the tasks blocked by do_idle()

Bug 1487804

Change-Id: Ic5e7f2d19fb8d35f43666d0e309dde3022349d92
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412061
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:53 -07:00
Deepak Nibade
6eab11c6e8 gpu: nvgpu: gk20a: add busy lock
- add rw_semaphore busy_lock for gpu busy() path
- take read lock on busy_lock inside gk20a_busy()
  so that all usual requests can execute simultaneously
- write lock can be taken when we need to block all
  of the gk20a_busy() calls

Bug 1487804

Change-Id: I1b162b38bce9621723d3e45280c6076816cf771a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412060
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:53 -07:00
Deepak Nibade
77a0b8eb13 gpu: nvgpu: gk20a: export wait_channel_idle()
- Export gk20a_wait_channel_idle() function from channel_gk20a.h
- also, return error -EBUSY from this function when channel is
  found to be not idle

Bug 1487804

Change-Id: Ia7425e9b1332260ee9a53dca55ab07541f2755a9
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412059
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:53 -07:00
Terje Bergstrom
0d7533fb4f gpu: nvgpu: When rail gating, flush only once
When rail gating invoke G_ELPG_FLUSH only once.

Bug 1421824

Change-Id: Ibde0e32b212e3b030e69a9cb837c87789887aabb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/408209
2015-03-18 12:09:53 -07:00
Terje Bergstrom
2fbf6e7afb gpu: nvgpu: Allow suppressing WFI on submit
Allow suppressing WFI when submitting work and requesting a fence
back.

Bug 1491545

Change-Id: Ic3d061bb4f116cf7ea68dbd6a1b2ace9f11d0ab5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/390457
2015-03-18 12:09:53 -07:00
Terje Bergstrom
af8c1dc3a8 gpu: nvgpu: Use old ctxsw boot method on gm20b
Boot FECS/GPCCS with old method on gm20b. We don't yet have
bootloader for it.

Change-Id: I09046960cd86b0402d3ea2cd8e4c92597766fa10
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/412604
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
2015-03-18 12:09:52 -07:00
Lauri Peltonen
e6b3d1e87f gpu: nvgpu: Add gk20a semaphore APIs
Add semaphore_gk20a.c/h that implement a new semaphore management API
for the gk20a driver. The API introduces two entities, 'semaphore pools'
and 'semaphores'.

Semaphore pools are memory areas dedicated for hosting one or more
semaphores. Typically, one pool equals one 4K page. A semaphore pool
is always mapped to the kernel memory, and it can be mapped and
unmapped to gpu address spaces using gk20a_semaphore_pool_map/unmap.

Semaphores are backed by 16 bytes of memory allocated from a semaphore
pool. The value of a semaphore can be 0=acuired or 1=released. When
allocated, the semaphores are initialized to the acquired state. They
can be released, or their releasing can be waited for by the CPU or GPU.

Semaphores are intended to be used only once, and after they are
released they should be freed so that the slot within the semaphore
pool can be reused. However GPU jobs must take references to the
semaphores that they use (similarly as they take references on memory
buffers that they use) so that the semaphore backing memory is not
reused too soon.

Bug 1450122
Bug 1445450

Change-Id: I3fd35f34ca55035decc3e06a9c0ede20c1d48db9
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/374842
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:52 -07:00
Deepak Nibade
dadaa5af56 gpu: nvgpu: gk20a: fix syncpt names for gk20a
nvhost_get_syncpt_host_managed() creates syncpt name based on
platform_device pointer passed to it
Passing host1x's pointer to this API results in setting gk20a
syncpt names as "host1x_0" which is conflicting

Hence to restore this pass gk20a's device pointer
which gives syncpt names as "gk20a.0_0"

Also, add a syncpt check for sycnpt received.

Bug 1305024

Change-Id: I4ff96c7c9ebff2dca385c5787a85b4a9451b9514
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/410121
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:51 -07:00
Terje Bergstrom
48239f5f8c gpu: nvgpu: Prune redundant cache maintenance
Remove redundant cache maintenance operations. Instance blocks and
graphics context buffers are uncached, so they do not need any cache
maintenance.

Bug 1421824

Change-Id: Ie0be67bf0be493d9ec9e6f8226f2f9359cba9f54
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/406948
2015-03-18 12:09:49 -07:00
Terje Bergstrom
3e5c123862 gpu: nvgpu: Always initialize system vm
PMU, FECS and GPCCS use the same address space. We used to initialize
the address space only if PMU is enabled. Create the system address
space always.

FECS and GPCCS used to have slower bit bang and faster DMA method
for loading ucode. Slower method is needed when FECS and GPCCS do not
have an address space. Remove the slower method as not anymore
needed.

Change-Id: I155619741ecc36aa6bf13a9c1ccb03c7c1330f0a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/406771
2015-03-18 12:09:49 -07:00
Deepak Nibade
df1852752a gpu: nvgpu: gk20a: free syncpt if last submit is complete
In channel_update(), we detect if channel is idle and if it is
idle then we free the syncpt. We do not free the syncpt if WFI is
scheduled on some other path.

Instead of checking for WFI, we can check if last submit is complete
or not (it can be WFI as well) and if last submit is complete then
we can free the syncpt.

Locking mechanism using submit lock will take care that syncpt is
kept alive until last submit or WFI completes

Bug 1305024

Change-Id: Ieafb82e1f924a01236ca73ed151eb03e88729835
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/405201
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:49 -07:00
Terje Bergstrom
2b48263b1f gpu: nvgpu: Do not realloc perfmon sample buffer
Allocate perfmon sample buffer only once.

Bug 1512840

Change-Id: I3f2a62b0fa28e6ba984ae3068a1d56ba461a0c29
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/408180
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
2015-03-18 12:09:49 -07:00
Terje Bergstrom
66bb831f44 gpu: nvgpu: Register as subdomain of host1x
Add gk20a as a sub power domain of host1x. This enforces keeping
host1x on when using gk20a.

Bug 200003112

Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/407006
(cherry picked from commit 009812b3e510518740e9c7e89b8b8b80439fe26a)
Reviewed-on: http://git-master/r/408013
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:48 -07:00
Kevin Huang
69f5a5718b gpu: nvgpu: gm20b: add ltc isr
Bug 1507804

Change-Id: Ic58e21f4d995cf4f4fc7bb5fc6ec84a6c4d25d46
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/403214
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:48 -07:00
Kevin Huang
0781b55fc1 gpu: nvgpu: halize ltc isr
Bug 1507804

Change-Id: I3cca0e83dbf911c94422f8bb0b2df675a170b990
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/403213
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:48 -07:00
Matt Pedro
6c6936858a Revert "gpu: nvgpu: Keep host1x on when GPU on"
This reverts commit 20d48a759b032116e3092e1df76518065da59879.

Change-Id: I93718a314b70ee9284a83ca69964883e670ad78d
Signed-off-by: Matt Pedro <mapedro@nvidia.com>
Reviewed-on: http://git-master/r/407969
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:48 -07:00
Terje Bergstrom
a82f92e318 gpu: nvgpu: Do not clear PMU state on rail gate
When rail gating, we cleared all PMU status. Clear only the relevant
fields.

Change-Id: I5b4e8d74339aae6f1c6b945f45b8378bb563e8be
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/406843
2015-03-18 12:09:48 -07:00
Terje Bergstrom
caae9bfd24 gpu: nvgpu: Keep host1x on when GPU on
Remove the path for turning on only gk20a. Always when turning on
hardware, turn both host1x and GPU on.

Change-Id: I5f972a487d3348bf2254bdb0fadb42ca600a559e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/406405
2015-03-18 12:09:47 -07:00
Arto Merilainen
219eb3d26b gpu: nvgpu: Fixes to static offset mappings
This patch addresses two issues in fixes offset mappings:
- VA unmapping did not use lists safely. This caused an application hang
if the application did not free all (fixed offset) buffers before quiting.
- GPU was not powered closing AS node. If the address space had areas that
were not freed, the driver tried to access hw without powering it up first.

Change-Id: Ida526d222ea4e03b8d765eca16574ddc1823e60d
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/405872
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:47 -07:00
Arto Merilainen
93044a4dc2 gpu: nvgpu: Generic platform
This patch adds minimal t124 generic platform configuration to
platform_gk20a_generic.c to allow testing the minimal configuration.

Bug 1434573

Change-Id: I1a3f00e14661023c8ff77d7576ba70cf98a95db5
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/381427
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:47 -07:00
Arto Merilainen
6f80a44c98 gpu: nvgpu: Fall-back to generic platform
Currently the generic platform is used only if the device tree
defines that we have a generic platform available, however, the
generic platform is fully compatible with the gk20a we have in tegra.

This patch modifies the definitions so that we use generic platform
also for tegra - even if if tegra configuration option is not enabled.

Bug 1434573

Change-Id: Ib35ce0ab935d27764e960bf4d74a5016ae047a1f
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/396867
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:47 -07:00
Sandarbh Jain
ebe7f110a1 gpu: nvgpu: gk20a: Control powergating on regops
Enable/disable powergating around regops so that the user
need not call the powergating IOCTLs with the regops IOCTL.
If the user does call the powergating IOCTL then the ref-counting
will ensure the correct behavior.

Bug 1451949

Change-Id: I1746f7d7cd1d2c0c497c213939df44a59d5d2834
Signed-off-by: Sandarbh Jain <sanjain@nvidia.com>
Reviewed-on: http://git-master/r/395131
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:47 -07:00
Arto Merilainen
6107c44ecd gpu: nvgpu: Create sysfs symlinks
gk20a is going to be moved under platform bus, however, the sysfs
interface should remain stable over the transition period. This
patch adds a symlink to keep current interfaces stable.

Bug 1311528
Bug 1434573

Change-Id: I951000f4b25285ff96e93eb726342d5b76cc84f1
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/396926
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:46 -07:00
Arto Merilainen
d224ca2008 gpu: nvgpu: Get host1x device from DTS
Currently the gpu driver assumes that the GPU is a child of host1x.
This is an invalid assumption and therefore we need to get the host1x
device from device tree based on nvidia,host1x property.

Bug 1311528
Bug 1434573

Change-Id: I097e39369aaa15ab6652cd23f353f88f7c2b9c48
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/395664
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:46 -07:00
Terje Bergstrom
596aa6e592 gpu: nvgpu: Disable timeout if not on silicon
Change-Id: I0add505d4f5c4b136f9f0228adbdc9aba960fcba
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/404276
Reviewed-by: Antoine Chauveau <achauveau@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
2015-03-18 12:09:46 -07:00
Terje Bergstrom
80befeeb83 gpu: nvgpu: Add support for SMSKED kind
Bug 1470957

Change-Id: Ief7c8970dafcc386a3a954593d4bb3a53be1b2a0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/404261
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chris Dragan <kdragan@nvidia.com>
Tested-by: Chris Dragan <kdragan@nvidia.com>
2015-03-18 12:09:45 -07:00
Prashant Malani
6157db5d51 gpu: nvgpu: gk20a: Update perfmon init
Make the perfmon sampling configurable, by adding an 'enabled' flag.
This is set according to the CONFIG initially. Modify the perfmon event
handler to not touch clock rates. Add a counter to count the number of
perfmon events.

Also add debugfs entries for the above.

Bug 1410515

Change-Id: Ic8197eef0e46e35af1179a5b06140393541cfd43
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/351564
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:45 -07:00
Arto Merilainen
4c7065b558 gpu: nvgpu: Create load sysfs node always
Currently creation of the load sysfs node is bound to devfreq
profile initialisation, however, this information is useful even
if the scaling is not enabled. This patch modifies the code to create
the sysfs node always.

Bug 1485489

Change-Id: Id20433344aa81108f89a36cd56c9a73dd9d2e1c8
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/399474
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:44 -07:00
Arto Merilainen
f2ef74fbff gpu: nvgpu: Fix return value in pmu mutex release
Bug 1495617

Change-Id: I689ed4303bb3959bb24bf79d52891de28431fc67
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/394904
(cherry-picked from commit a04c51430b186d23953960965ce3ab229968d1f7)
Reviewed-on: http://git-master/r/399565
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:44 -07:00