Commit Graph

542 Commits

Author SHA1 Message Date
Thomas Fleury
6fa5da61d7 gpu: nvgpu: use engine_id to access engine_info
Generalize use of "engine_id" variable name to index f->engine_info.

Jira NVGPU-4511

Change-Id: Ie3bc2c701dc3bab833d6ac134273dd6a102528c2
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2262219
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Thomas Fleury
66b68edd6b gpu: nvgpu: iterator name for active_engines
Some functions used engine_id or eng_id to index active_engines_list,
which could get confusing when used in conjunction with similar
variable as active_engine_id or act_eng_id.

Use generic iterator name i or j instead, to make it clear that
f->active_engines_list is NOT indexed by engine id.

Jira NVGPU-4511

Change-Id: I07a6bf00dfb6d4e608b10f2f79e38a70e557428c
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2262218
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Antony Clince Alex
cae36cdc35 gpu: nvgpu: userspace: make common.ecc unit test visible to doxygen
The unit test files for common.ecc unit was not included in the doxygen
source file list, causing them not be parsed by doxygen. Updated doxygen
source list to include them.

Fixed doxyen targets tag for unit test functions within common.ecc unit.

Jira: NVGPU-4819

Change-Id: Idacf3d4d5f297950255c47b6380386be88fbd606
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2274725
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Thomas Fleury
67696c6870 gpu: nvgpu: conditionally compile tsg event ids
event_id_list and event_id_list_locks fields are only
needed in nvgpu_tsg when CONFIG_NVGPU_CHANNEL_TSG_CONTROL
is defined.

Conditionally compile those fields and related code,
so that they are removed from safety build.

Jira NVGPU-4376

Change-Id: I8678aa1b8cd4166aa37bcb42cda1eb9c703fd32f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2273261
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Thomas Fleury
2f29272d61 gpu: nvgpu: line coverage for gk20a_runlist_wait_pending
Use fault injection to test nvgpu_timeout_init failure case
in gk20a_runlist_wait_pending.

Jira NVGPU-4673

Change-Id: I62810db0877339909d99f1de8d14847557ecb8fd
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2272458
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Deepak Nibade
fa90056392 gpu: nvgpu: unit: add unit test for gr idle hal
Add unit test coverage for HAL function g->ops.gr.init.wait_idle
exposed by common.gr.init subunit.

Jira NVGPU-4458

Change-Id: I66b24b335961dfaf9315b9fcd3a3df421b80a30a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2274184
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Sagar Kamble
1513061fdd gpu: nvgpu: falcon: test and code updates for more branch coverage
Passing branch of nvgpu_timeout_peek_expired was not covered due to jump
over it in nvgpu_falcon_mem_scrub_wait. Remove that jump to cover the
branch.
Add unit test for covering the error handling in case of read from
DMEM control register returns invalid data using fault injection.

JIRA NVGPU-4814

Change-Id: I9f99186bd2b1c5f39ead130d3161d3e7fa622ac4
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2272937
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
tkudav
7774669a30 gpu: nvgpu: Add branch coverage for common.fbp
Add missing branch coverage for nvgpu_fbp_remove_support()
corresponding to g->fbp == NULL case.

JIRA NVGPU-4679

Change-Id: I2d8e97b0d35a5a6738dc649500e2172560fe121f
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2272934
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Philip Elcan
6800aa7c51 gpu: nvgpu: unit: add worker unit test
Add unit test for worker unit.

To get full coverage, a new fault injection is added for the thread API
nvgpu_thread_is_running to return true after a number of executions.

JIRA NVGPU-915

Change-Id: Ib631d4af7dac3dde37bed3b5de81f3164a6df1b0
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265714
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Vedashree Vidwans
399a8f3125 gpu: nvgpu: unit: nvgpu.hal.fifo.ctxsw_timeout UT
This unit test covers most of the nvgpu.hal.fifo.ctxsw_timeout module
lines and all branches.

Jira NVGPU-4388

Change-Id: I3b3855e6710073c1f878a2f7155a975373094da1
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2264345
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Vedashree Vidwans
6ef960dbc7 gpu: nvgpu: unit: nvgpu.hal.fifo.ramfc unit test
This unit test covers most of the nvgpu.hal.fifo.ramfc module lines and
all branches.

Jira NVGPU-4390

Change-Id: I7ef596089deab6fdb351f239124e59dc416a3aa7
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2260493
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Vedashree Vidwans
9c7051d37f gpu: nvgpu: unit: nvgpu.hal.fifo.ramin unit test
This unit test covers most of the nvgpu.hal.fifo.ramin module lines and
almost all branches.

Jira NVGPU-4391

Change-Id: Iaae4240305822707dd6446cec0ecc9e833ebffdc
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2259638
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Vedashree Vidwans
0ca906a6ad gpu: nvgpu: unit: fifo: fifo unit test
This unit test covers most of the nvgpu.common.fifo.fifo module lines
and almost all branches.

Jira NVGPU-3697

Change-Id: I5722277a3e1630a902f63b707eb3de1c4e1876b0
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2237796
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Vedashree Vidwans
917fb2e2df gpu: nvgpu: unit: fifo: channel unit test
This unit test covers remainder of the nvgpu.common.fifo.channel module
lines and branches.

Jira NVGPU-3696

Change-Id: I590faac1e4340d8fa2e5a7e591249128ec2b8760
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241973
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
dnibade
27122d10d7 gpu: nvgpu: unit: add unit tests for fe idle and pwr_mode HALs
Add unit test coverage for below HALs in common.gr.init subunit:

- g->ops.gr.init.wait_fe_idle
- g->ops.gr.init.fe_pwr_mode_force_on

Jira NVGPU-4458

Change-Id: I924f9e49abcb5846f24c620bba7fd1c704c36932
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2270652
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
dnibade
f2cc27f3d1 gpu: nvgpu: unit: add more coverage to gr.init config unit test
Add error checking coverage for below gr.init HAL functions in
unit test test_gr_init_hal_config_error_injection()

- g->ops.gr.init.pd_skip_table_gpc
- g->ops.gr.init.load_sw_veid_bundle
- g->ops.gr.init.load_sw_bundle_init
- g->ops.gr.init.load_method_init

Jira NVGPU-4458

Change-Id: I9f28fbbdc4f0160d852ebc2cbb56255ac6a74289
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2270651
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Philip Elcan
5f8b8f0ef9 gpu: nvgpu: unit: init: check for correct hal
Add check to ensure the gv11b HAL was initialized. This satisfies the
action from the init FMEA to test for the correct HAL.

JIRA NVGPU-4010

Change-Id: I519872c86d204dbbf504da3322a9d0816ffc3b0f
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2266501
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Thomas Fleury
cb273476b6 gpu: nvgpu: unit: branch coverage for tsg
Cover remaining branches for:
- nvgpu_tsg_abort
- nvgpu_tsg_unbind
- nvgpu_tsg_mark_error

Jira NVGPU-4673

Change-Id: I9dacbf286f1a63cb4c82854984d83b6b9d1fcde3
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2266485
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Vedashree Vidwans
fb6fec4e3e gpu: nvgpu: modify unit tests to resolve failures
Currently, GVS is failing intermittently for some tests in nvgpu-runlist
and hal/mm/mmu_fault.
This patch resets gk20a structure at the end of each mmu_fault test. The
test_runlist_reload_ids and test_runlist_update_locked tests are
modified to use fifo support environment initialized for nvgpu-runlist
unit test.

Bug 2791755

Change-Id: I0b69b4f216f8f820b0a480ed76170b523b434bef
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265676
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
tkudav
cb8003d9e0 gpu: nvgpu: Modify common.top for better coverage
Following changes are done to common.top code and UT:

1.Change return type for device_info_parse_enum to void as it can never
return non-zero value.
   - This is a private HAL and is only called by get_device_info HAL.
   - It gets called only for table entry with entry type = enum.
   - So there is no error path left.
This helps remove unnecessary branches and get better branch coverage

2. Check if the data parsing function pointers are not NULL before
parsing the device tree. Return error if there are no functions
to interpret the device_info table registers. Add checks for same in
unit test test_get_device_info().

JIRA NVGPU-2204

Change-Id: I8833da7aa58b070d19b50ee17f64362f301bd792
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2269603
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Vedashree Vidwans
a615604411 gpu: nvgpu: fix MISRA 11.2 nvgpu_sgl
MISRA rule 11.2 doesn't allow conversions of a pointer from or to an
incomplete type. These type of conversions may result in a pointer
aligned incorrectly and may further result in undefined behavior.

This patch addresses rule 11.2 violations related to pointers to and
from struct nvgpu_sgl. This patch replaces struct nvgpu_sgl pointers by
void pointers.

Jira NVGPU-3736

Change-Id: I8fd5766eacace596f2761b308bce79f22f2cb207
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2267876
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Thomas Fleury
5856b230fb gpu: nvgpu: add gv11b device_info parse data
Device info data format has changed from gp10b to
gv11b, and MMU fault id was incorrectly decoded for GR engine.
Add gv11b_device_info_parse_data HAL to decode device info
data with correct field definitions.

Move gp10b device_info parse data to non-fusa, since
it is not used anymore in safety build.

Jira NVGPU-4511

Change-Id: I2b3f3b5fec977d63a9ad6cfd99c04f375cf997e8
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2262217
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
tkudav
933b62a36e gpu: nvgpu: Add branch coverage for common.bus
Cover all possible branches for if statements.

JIRA NVGPU-928

Change-Id: I29dfa9e6f061cfae65619e4518ccf685ba9a4bea
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2266235
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
dnibade
55ea8a089d gpu: nvgpu: unit: add coverage tests for gr.init config APIs
Add code coverage tests for functions in gr.init subunit that need
tweaks to GR engine configuration for code/branch coverage.

Jira NVGPU-4458

Change-Id: Ic3d1c371768e74bde725bb44361280820ef1a774
Signed-off-by: dnibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265457
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
dnibade
ab76dc1ad5 gpu: nvgpu: unit: add coverage tests for gops.gr.init.ecc_scrub_reg
Add new unit test to cover gops.gr.init.ecc_scrub_reg HAL function

gops.gr.init.ecc_scrub_reg HAL can generate TIMEOUT errors which are
not returned to caller currently. Update this HAL to return int value
for error propagation.

Jira NVGPU-4458

Change-Id: I98f4d5af2ef17cc4301951fec4d660638c8ef72c
Signed-off-by: dnibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265456
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
dnibade
5f030d6c52 gpu: nvgpu: unit: add coverage tests for wait_empty and global_pagepool hals
Add new subtests to cover gops.gr.init.wait_empty() and
gops.gr.init.commit_global_pagepool() hals of common.gr.init subunit

Jira NVGPU-4458

Change-Id: Iffc2e95456518234ba6466fe1a9767c0eb53f2e6
Signed-off-by: dnibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265455
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
tkudav
f0ff9dbafd gpu: nvgpu: Update test types in common.bus SWUTS
Use the updated test types.
Other (setup) --> Other (cleanup)
Feature based --> Feature

Also, change test names to unique identifier to avoid below errors in
SWVS:
Warning doxygenfunction: Unable to resolve multiple matches for
function 'test_xxx' with arguments () in doxygen xml output for
project 'nvgpu_doxygen'...

JIRA NVGPU-4679

Change-Id: If8a6b9ec8b26c3f99bc657bce24751b0e75fabbf
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2269046
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
tkudav
eaf2088217 gpu: nvgpu: Update test types in priv_ring SWUTS
Use the updated test types.
Other (setup) --> Other (cleanup)
Feature based --> Feature

Also, change test names to unique identifier to avoid below errors in
SWVS:
Warning doxygenfunction: Unable to resolve multiple matches for
function 'test_xxx' with arguments () in doxygen xml output for
project 'nvgpu_doxygen'...

JIRA NVGPU-4679

Change-Id: I66cda323387163a41808be09a69f625d53b744ed
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2269041
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
tkudav
d5b2deee29 gpu: nvgpu: Update test types in common.top SWUTS
Use the updated test types.
Other (setup) --> Other (cleanup)
Feature based --> Feature

Also, change test names to unique identifier to avoid below errors in
SWVS:
Warning doxygenfunction: Unable to resolve multiple matches for
function 'test_xxx' with arguments () in doxygen xml output for
project 'nvgpu_doxygen'...

JIRA NVGPU-4679

Change-Id: Ic2701bec2eafa0e64891d5c6d404847f14c41e55
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2268937
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
tkudav
a1259a6795 gpu: nvgpu: Update test types in common.fbp SWUTS
Use the updated test types.
Other (setup) --> Other (cleanup)
Feature based --> Feature

Also, change test names to unique identifier to avoid below errors in
SWVS:
Warning doxygenfunction: Unable to resolve multiple matches for
function 'test_xxx' with arguments () in doxygen xml output for
project 'nvgpu_doxygen'...

JIRA NVGPU-4679

Change-Id: I2bddf608f22d8c9f9dd5fbde9ca39f4417839077
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2267587
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Vedashree Vidwans
0033a4402e gpu: nvgpu: fix userspace build failure
This patch adds a missing backslash to escape newline character.

Jira NVGPU-4675

Change-Id: I9ca82c4fa5dd26905ee4ea983e2a69e2cd04acea
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2267877
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00
Nicolas Benech
385397fa34 gpu: nvgpu: unit: add tlb_invalidate fail cases to page_table
This patch adds 2 subcases to test the error flow in the case of
the tlb_invalidate operation failing during map and unmap.
Also due to the removal of an assert check, the
test_nvgpu_gmmu_init_page_table_fail needed to be updated.

JIRA NVGPU-907

Change-Id: I2c23d32f3482f2e49c1ad64073ee0e0300358f26
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2264293
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2020-12-15 14:10:29 -06:00
Thomas Fleury
a5470fab90 gpu: nvgpu: unit: branch coverage for gp10b engine HAL
Add remaining branch coverage for:
- gp10b_engine_init_ce_info (invalid enum read from dev info).

Jira NVGPU-4673

Change-Id: Ibeb673374f547d18a9897eb9dedc7502345461b2
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265793
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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2020-12-15 14:10:29 -06:00
Thomas Fleury
8ea850ccb6 gpu: nvgpu: unit: branch coverage for gv100 engine HAL
Add remaining branch coverage for:
- gv100_dump_engine_status (case w/ no engine)

Jira NVGPU-4673

Change-Id: I1d1eb61752d00a427e79f92f470ff072253791e1
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265792
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2020-12-15 14:10:29 -06:00
Antony Clince Alex
7849577918 nvgpu: userpace: add test for ecc unit
Add the test cases to valid the following unit interfaces:
 - nvgpu_ecc_init_support
 - nvgpu_ecc_finalize_support
 - nvgpu_ecc_counter_init
 - nvgpu_ecc_free

Jira: NVGPU-2179

Change-Id: I8181c85ff2762bd8170b51eaa685476d0850386b
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2264643
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prateek Sethi <prsethi@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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2020-12-15 14:10:29 -06:00
Vaibhav Kachore
c7eb04ab01 gpu: nvgpu: remove non-safe files from safety build
Few non-safe files are used in safety build. This patch removes them
from safety build.

Bug 200573132

Change-Id: I9cad5a70fda981a585a0ce3e9da949bcb9eee903
Signed-off-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2263082
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2020-12-15 14:10:29 -06:00
Nicolas Benech
b682091b13 gpu: nvgpu: SWUTS: clean up test types
Apply the following changes to test types:
* "Init" --> "Other (setup)"
* "Coverage" --> Removed since it's implied for all tests
* "Feature based" --> "Feature"
* "Boundary Value analysis" and "Boundary values based" --> "Boundary values"
* "Error guessing based" --> "Error guessing"

JIRA NVGPU-3510

Change-Id: I3a9c0c59e6ad806f3479caa5e9a62f4d89f76923
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265670
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2020-12-15 14:10:29 -06:00
Vedashree Vidwans
7dd618980a gpu: nvgpu: fix build errors in userspace make
Recent patches added new dependency of mock-iospace for FIFO unit tests.
However, mock-iospace binaries are generated after compiling FIFO UTs.
This leads to "cannot find -lmock-iospace" errors. This patch moves
mock-iospace compilation before FIFO UTs.

Jira NVGPU-4675

Change-Id: Ice2dc42412e06cc9e41b31bc852c220b09974ae2
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265396
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2020-12-15 14:10:29 -06:00
vinodg
d10a39e143 gpu: nvgpu: add test for branch coverage in gr.falcon hal
Use nvgpu_readl_fault_injection() with gr.falcon hal code,
where the register values are hardcoded in the function.

Fault injection added to gr_fecs_arb_ctx_cmd_r() register
read in gm20b_gr_falcon_wait_for_fecs_arb_idle function.

Jira NVGPU-4453

Change-Id: I2c8d8cf9e059758bc0ba2a16f93259d347a14d84
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265046
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
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2020-12-15 14:10:29 -06:00
Adeel Raza
fd870b300e gpu: nvgpu: rename nvhost_dev to nvhost
A couple of structure member variables were named "nvhost_dev". This
causes a name conflict with a structure name. MISRA frowns upon name
conflicts. Therefore, rename the member variables to "nvhost".

JIRA NVGPU-3873

Change-Id: I4d35eb2d121b3c17499055d8781a61641594811e
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2262190
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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2020-12-15 14:10:29 -06:00
Sagar Kamble
f3421645b2 gpu: nvgpu: compile out fb and ramin non-fusa code
fbpa related functions are not supported on igpu safety. Don't
compile them if CONFIG_NVGPU_DGPU is not set.
Also compile out fb and ramin hals that are dgpu specific.
Update the tests for the same.

JIRA NVGPU-4529

Change-Id: I1cd976c3bd17707c0d174a62cf753590512c3a37
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265402
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2020-12-15 14:10:29 -06:00
Thomas Fleury
a50802510f gpu: nvgpu: unit: improve coverage for gv11b pbdma HAL
Improve branch coverage for the following HALs:
- gv11b_pbdma_handle_intr_0 (add error cases for report_pbdma_error)
- gv11b_pbdma_handle_intr_1 (add HCE interrupt case)

Jira NVGPU-3694
Jira NVGPU-4673

Change-Id: I658a7c270af16152ccb6a0b19da1fa8c68e9c2ec
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2263669
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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2020-12-15 14:10:29 -06:00
Thomas Fleury
31d689d489 gpu: nvgpu: unit: improve coverage for gm20b pbdma HAL
Add unit test for the following HAL:
- gm20b_pbdma_get_ctrl_hce_priv_mode_yes

Jira NVGPU-3694
Jira NVGPU-4673

Change-Id: Ie6c0266753877b5fe7a5c32bf6b971d1ef34d724
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2263651
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2020-12-15 14:10:29 -06:00
Thomas Fleury
569b781cb2 gpu: nvgpu: unit: skip falcon dump for fifo intr
Register address space for falcon is not registered
and g->ops.gr.falcon.dump_stats is triggering multiple
ABORTs while testing gv11b_fifo_intr_0_isr.

Use stub for g->ops.gr.falcon.dump_stats.

Jira NVGPU-4386

Change-Id: I6fb2b9b59f533626fce49bf4d3ff72cb8a1a6c44
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2264850
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
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2020-12-15 14:10:29 -06:00
Prateek sethi
28d21878a7 gpu: nvgpu: fix memory fault in invalid_pd_alloc
nvgpu_pd_alloc() calls gk20a_from_vm which is extracting g from
vm->mm->g without assigning mm pointer to vm->mm. Assigning the
pointers.

Bug 200577095

Change-Id: Ibe2757b0616fd8e87df509abe5d85e90d989d45c
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2264751
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2020-12-15 14:10:29 -06:00
Philip Elcan
ae8f71a462 gpu: nvgpu: unit: add therm unit test
Add unit test for common.therm and gv11b therm HALs.

JIRA NVGPU-936

Change-Id: Iff857ad24eac729b5f7bf9868c1f05becefbaaad
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2260441
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2020-12-15 14:10:29 -06:00
vinodg
3400d1b6be gpu: nvgpu: branch coverage for gr.falcon hal
Update gr.falcon hal test for branch coverage.
Generate expected bug by passing 64bit value for falcon.bind_instblk.

Jira NVGPU-4453

Change-Id: I735f96f21e54fce199a47c37043acc81006ee806
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2264321
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2020-12-15 14:10:29 -06:00
Divya Singhatwaria
2f9548c1f8 gpu: nvgpu: Add test cases for ACR construct execute code
Adding more test cases to cover fail/negative scenarios
and more branches in the nvgpu_acr_construct_execute() code

JIRA NVGPU-4319

Change-Id: I998f914abf9ba592a3a014698efaa2437236f448
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2263868
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2020-12-15 14:10:29 -06:00
Divya Singhatwaria
61315f0fbb gpu: nvgpu: Add test cases for HS bootstrap code
Adding more test cases to cover fail/negative scenarios
and more branches in the nvgpu_acr_bootstrap_hs_acr() code

JIRA NVGPU-4319

Change-Id: Ib8b154f7e59e60971bb231cf7dbe0b9b3f209384
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2263203
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2020-12-15 14:10:29 -06:00
ddutta
83103cdcca gpu: nvgpu: move set_min_max out of safety build
nvgpu_channel_sync_set_min_eq_max is not used as part of the safety
build and hence is moved out. channel_sync_syncpt_set_min_eq_max is
also moved out as a part of the above function.

Also add a branch coverage for the case when g->disable_syncpoints is
set to true.

Jira NVGPU-913

Change-Id: I2512d01e105551732aad63b2800bb4cb6d913cb2
Signed-off-by: ddutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2263003
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GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2020-12-15 14:10:29 -06:00