dinesh
8244de0729
gpu: nvgpu: Change in scheduler class for threads
...
As per one of the requirement priority of interrupt threads in
qnx should be changed to 21 with SCHED_RR class. NVGPU driver
is creating threads with FIFO class. This makes delay in scheduling
other interrupt threads.
This is added to change the schduler class to RR.
JIRA NVGPU-4121
Change-Id: Ie0a5f08b95cfab4ffbbd3c0c74a53324c64c202f
Signed-off-by: dinesh <dt@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2206210
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2020-12-15 14:05:52 -06:00
Petlozu Pravareshwar
1e7c3cb038
gpu: nvgpu: add fault injection for posix routines
...
This adds the ability to enable fault injection for some of the
POSIX implementation of the nvgpu condition and thread routines.
JIRA NVGPU-2679
Change-Id: I6abb9d5ba3fbe8921e48a135e440c179702dcf6b
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2174647
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2020-12-15 14:05:52 -06:00
ajesh
74782201ee
gpu: nvgpu: fix MISRA violation in threads unit
...
MISRA directive 4.7 states that if a function returns error
information, then that error information shall be tested. Fix
violation of Dir 4.7 in threads unit
Jira NVGPU-3290
Change-Id: Ibafc6f525de2c73d972ed2e60b21f44727ca5807
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2126416
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2019-06-06 16:27:33 -07:00
ajesh
14aaa1f6dc
gpu: nvgpu: fix MISRA violations in thread unit
...
MISRA rule 21.2 forbids the usage of identifier names which start with
an underscore. Fix the violations of MISRA rule 21.2 in posix thread
unit.
Jira NVGPU-3139
Change-Id: I2f55ffe23f376fe6247926e449fcbd021d75863d
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2107392
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Reviewed-by: Dinesh T <dt@nvidia.com >
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2019-04-30 04:44:47 -07:00
Philip Elcan
04c8c41516
gpu: nvgpu: posix: do not join threads twice
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Calling pthread_join() on a thread twice is undefined. So, check if the
thread is still running before calling join each time.
JIRA NVGPU-3114
Change-Id: I9c1b243f046372840fd9a122c375b226759655c0
Signed-off-by: Philip Elcan <pelcan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2097897
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2019-04-16 10:47:03 -07:00
ajesh
d78a362a2f
gpu: nvgpu: use posix threads for QNX
...
Unify posix thread unit with qnx. Also, modify the thread structure
and thread create function as part of unification with qnx.
Jira NVGPU-2152
Change-Id: Ifc0127dd9a4ff5212ae130e0d6dbe640d7d67377
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2029783
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2019-03-25 03:04:32 -07:00
Adeel Raza
800d96865d
gpu: nvgpu: posix: MISRA rule 15.6 fixes
...
MISRA rule 15.6 requires that all if/else/loop blocks should be enclosed
by brackets. This patch adds brackets to single line if/else/loop blocks
in the POSIX code.
JIRA NVGPU-775
Change-Id: Idafd5a5068c23b850ad1b0b083550a75b35588c1
Signed-off-by: Adeel Raza <araza@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2011739
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com >
Reviewed-by: Scott Long <scottl@nvidia.com >
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2019-02-05 19:23:58 -08:00
Antony Clince Alex
1bfe1c157e
gpu: nvgpu: Implement graceful thread stop
...
Implement graceful thread stop API to allow threads to exit
gracefully.
Jira NVGPU-1843
Bug 2461665
Change-Id: I297f3bfa272cb22818033440c2760dc2a458653b
Signed-off-by: Antony Clince Alex <aalex@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2000755
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2019-01-25 01:35:29 -08:00
Peter Daifuku
ebf874c351
nvgpu: pmu: cleanup init thread on destroy
...
In nvgpu_kill_task_pg_init(), call nvgpu_thread_join()
if the init thread is no longer running in order to
reclaim thread resources.
Bug 2452799
JIRA ESRM-437
Change-Id: Id9c67f689027f00039ac2df226ee9c28ad89dd1d
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1967983
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2018-12-10 14:15:14 -08:00
Nicolas Benech
4e41a0b199
gpu: nvgpu: Fix LibC MISRA 17.7 in os/posix
...
MISRA Rule-17.7 requires the return value of all functions to be used.
Fix is either to use the return value or change the function to return
void. This patch contains fix for all 17.7 violations instandard C functions
in OS/Posix interface.
JIRA NVGPU-1036
Change-Id: I2da417edc992f16de24cdff536c0538f1fde8b61
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1929901
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2018-10-31 15:25:27 -07:00
Alex Waterman
b15624b39b
gpu: nvgpu: posix: move the posix dir to os
...
Since the posix code is supporting a particular OS this code
should belong under os/ not common/.
Change-Id: Idf5f75b8ab9d614c9dd43ea23dab8df3c346c0ef
Signed-off-by: Alex Waterman <alexw@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1800658
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2018-08-17 13:54:25 -07:00
