Created PMU fw unit to hold PMU RTOS f/w specific ops, images,
flags & command arguments needed for PMU RTOS ucode support.
Moved PMU fw ops from gk20a.gpu_ops to pmu.fw.ops as these ops
are needed to support different version of PMU fw version for
different chips
JIRA NVGPU-1955
Change-Id: I51385d8c20524431f07cba3378676464663deb20
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2090769
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
MISRA Rule-17.7 requires the return value of all functions to be
used. Fix is either to use the return value or change the function
to return void.
The ACR operations acr_fill_bl_dmem_desc and patch_wpr_info_to_ucode
were returning an int that was always 0. This patch changes their
signature to return void instead.
JIRA NVGPU-3032
Change-Id: I4116db3b5aec92ee9b914f5549d6c7c994affd4a
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2090042
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Currently ACR chip specific sw init files are named as acr_$CHIP.c/h
which adds confusion as ACR HAL files, renamed to acr_sw_$CHIP.c.h
to reflect these files set ACR properties required by ACR ucode to
execute on selected chip.
JIRA NVGPU-2907
Change-Id: I12d8a481480eb89609d1cb73c9f20b24ae10651f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2081633
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
