Commit Graph

81 Commits

Author SHA1 Message Date
Richard Zhao
9dd3bb2e62 gpu: nvgpu: vgpu: move t19x specific code to general code
- remove vgpu_t19x.h and tegra_vgpu_t19x.h
- merge t19x specific ivc commands to the big enum
- move TEGRA_VGPU_ATTRIB_MAX_SUBCTX_COUNT to constants

Jira EVLR-2293

Change-Id: I34344bffa03bb69e1282b1f19382e3199f9ba105
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1636128
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-01-12 12:43:40 -08:00
Thomas Fleury
6b90684cee gpu: nvgpu: vgpu: get virtual SMs mapping
On gv11b we can have multiple SMs per TPC. Add sm_per_tpc in
vgpu constants to properly dimension the virtual SM to TPC/GPC
mapping in virtualization case.
Use TEGRA_VGPU_CMD_GET_SMS_MAPPING to query current mapping.

Bug 2039676

Change-Id: I817be18f9a28cfb9bd8af207d7d6341a2ec3994b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1631203
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-01-10 15:57:20 -08:00
Aparna Das
4f67a794dd gpu: nvgpu: vgpu: add io coherency support
Modify command message parameter to support io
coherency.

Jira EVLR-2025

Change-Id: I38b21c72d85f559555c4d97dab73d0f715ecc655
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1614388
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-12-30 18:50:40 -08:00
Richard Zhao
fa1b18c171 gpu: nvgpu: vgpu: add tsg release command
gv11b needs tsg release callback to release CE method buffer.

Bug 2022929

Change-Id: I32e27a5fa49eb61b9c2fc72ea32034191a9be48e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1611631
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-12-10 10:36:39 -08:00
Deepak Nibade
ba8dc31859 Merge remote-tracking branch 'remotes/origin/dev/linux-nvgpu-t19x' into linux-nvgpu
Bug 200363166

Change-Id: Ic662d7b44b673db28dc0aeba338ae67cf2a43d64
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2017-11-15 23:21:35 -08:00
Thomas Fleury
738bee0373 gpu: nvgpu: vgpu: add vgpu_gv11b_tsg_bind_channel
Add TEGRA_VGPU_CMD_TSG_BIND_CHANNEL_EX command to pass subctx_id
and runqueu_sel to RM server. Use this command in gv11b's
implementation of gops->fifo.tsg_bind_channel.

Jira EVLR-1751

Change-Id: I8ba69c95ea1c6bb7fa106588b6420ed543b2386b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579840
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-11-08 19:26:30 -08:00
Aparna Das
df4e88a21d gpu: nvgpu: vgpu: add support for gv11b syncpoints
In t19x, gv11b semaphore read and write operations are
translated to host1x syncpoint read and write operations
using semaphore syncpoint shim aperture. Implement relevant
vgpu hal functions for this in fifo hal.

Jira EVLR-1571

Change-Id: I6296cc6e592ea991e1c01bc9662d02fb063ff3c7
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1516367
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-24 01:26:17 -07:00
Richard Zhao
0130c7ba43 gpu: nvgpu: vgpu: add num_pce to constants
Implement hal gops->ce2.get_num_pce.

Jira VFND-3797

Change-Id: Ie4fd3f170f2961ab5ebd1867b83bfda40e57aa2b
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1543020
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-08-28 19:34:23 -07:00
Richard Zhao
0e0767672a gpu: nvgpu: vgpu: get engines info from RM server
- get engines info from constants
- remove according HAL from gp10b vgpu

Jira VFND-3797

Change-Id: If010e59c358ab0519cb0d8d6211c0bcc20fc3723
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1536179
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-08-28 19:34:22 -07:00
Richard Zhao
1ac8f6477d gpu: nvgpu: vgpu: add TEGRA_VGPU_ATTRIB_MAX_SUBCTX_COUNT
Get max subctx count from RM server.

Jira VFND-3797

Change-Id: I95de2271a77bedfa8703231fa45da05c7d2da3e6
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1543018
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-08-28 17:04:31 -07:00
Richard Zhao
6a25181882 gpu: nvgpu: vgpu: add basic t19x HALs
- Added t19x vgpu platform data
- Added basic vgpu HAL for gv11b.
- Added subctx header HAL.

Jira VFND-3796

Change-Id: I2b99364801b41d042b53e057f1a30e1194f354c3
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master/r/1474729
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-29 22:34:37 -07:00
Richard Zhao
28093a374b gpu: nvgpu: vgpu: add t19x support
- add commit_inst hal ops
- add t19x cmds to cmd big union
- add t19x vgpu driver and call t19x hal init
- get guest channel_base to calculate hw channel id

Jira VFND-3796

Change-Id: Ic2431233fd174afc2c84c4794e20552e6e88b1dc
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master/r/1474715
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-29 22:34:36 -07:00
Peter Daifuku
f7e37e6847 gpu: nvgpu: vgpu: perfbuffer support
Add vgpu support for ModeE perfbuffers

- VM allocation is handled by the kernel, with final mapping
  handled by the RM server
- Enabling/disabling the perfbuffer is handled by the RM server

Bug 1880196
JIRA EVLR-1074

Change-Id: Ifbeb5ede6b07e2e112b930c602c22b66a58ac920
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master/r/1506747
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-27 15:44:11 -07:00
Sachit Kadle
4d88952760 gpu: nvgpu: vgpu: add freq capping support
Currently callbacks from the PM_QOS framework (for
thermal events), result in a RPC call to set GPU frequency.

Since the governor will now be responsible for setting desired
rate, the max PM_QOS callback will now cap the possible
GPU frequency w/ a new RPC call to the server. The server
is responsible for setting the ultimate frequency
based on the cap & desired rates.

Jira VFND-3699

Change-Id: I806e309c40abc2f1381b6a23f2d898cfe26f9794
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1295543
(cherry picked from commit e81693c6e087f8f10a985be83715042fc590d6db)
Reviewed-on: http://git-master/r/1282467
(cherry picked from commit 7b4e0db647572e82a8d53e823c36b465781f4942)
Reviewed-on: http://git-master/r/1321836
(cherry picked from commit 57dafc08a5)
Reviewed-on: http://git-master/r/1313469
Tested-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-19 16:36:26 -07:00
Sachit Kadle
b3a7c2b305 gpu: nvgpu: vgpu: add devfreq support
Add devfreq governor support in order to allow frequency scaling
in virtualization config. GPU clock frequency operations are
re-directed to the server over RPC.

Bug 200237433

Change-Id: I1c8e565a4fff36d3456dc72ebb20795b7822650e
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1295542
(cherry picked from commit d5c956fc06697eda3829c67cb22987e538213b29)
Reviewed-on: http://git-master/r/1280968
(cherry picked from commit 25e2b3cf7cb5559a6849c0024d42c157564a9be2)
Reviewed-on: http://git-master/r/1321835
(cherry picked from commit f871b52fd3)
Reviewed-on: http://git-master/r/1313468
Tested-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-06-19 16:36:26 -07:00
Thomas Fleury
741e5c4517 gpu: nvgpu: hal for timestamps correlation
In order to perform timestamps correlation for FECS
traces, we need to collect GPU / GPU timestamps
samples. In virtualization case, it is possible for
a guest to get GPU timestamps by using read_ptimer.
However, if the CPU timestamp is read on guest side,
and the GPU timestamp is read on vm-server side,
then it introduces some latency that will create an
artificial offset for GPU timestamps (~2 us in
average). For better CPU / GPU timestamps correlation,
Added a command to collect all timestamps on vm-server
side.

Bug 1900475

Change-Id: Idfdc6ae4c16c501dc5e00053a5b75932c55148d6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1472447
(cherry picked from commit 56f56b5cd9)
Reviewed-on: http://git-master/r/1489183
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-15 11:53:10 -07:00
Konsta Holtta
f6c921ec97 gpu: nvgpu: bring back tegra idle registration
To make do_idle work when nvgpu is built as a module, reverse the order
of call dependencies for do_idle. Don't provide visible
gk20a_do_{idle,unidle}() functions for the kernel but instead call the
kernel for registering and unregistering pointers to them when the
driver loads and unloads.

Refactor the internal __gk20a_do_{idle,unidle} functions to take a
struct gk20a * instead of struct device *, and use the callback api for
providing that g instead of retrieving the plat device from device tree.

Bug 200290850

Change-Id: Ibef8b069302e547b298069cbb97734f461a10cc3
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1493774
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-15 05:23:19 -07:00
Richard Zhao
914bb78a7d gpu: nvgpu: vgpu: move TEGRA_VGPU_ATTRIB_PREEMPT_CTX_SIZE to constants
Also removed deprecated TEGRA_VGPU_ATTRIB_*, but leave a place holder
in case someone wants to use this command in future.

Jira VFND-3796

Change-Id: Ic36a59db238d276b0e3dd68a9d8ec5834a04333d
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1457497
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-09 14:55:12 -07:00
Thomas Fleury
b03afb6d5c gpu: nvgpu: add ioctls to get current timeslice
Add the following ioctls
- NVGPU_CHANNEL_IOCTL_GET_TIMESLICE for channel timeslice in us
- NVGPU_TSG_IOCTL_GET_TIMESLICE for TSG timeslice in us

If timeslice has not been set explicitly, ioctl returns the
default timeslice that will be used when programming the runlist
entry.

Bug 1883271

Change-Id: Ib18fdd836323b1a2d4efceb1e27d07713bd6fca5
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1469040
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-24 04:55:36 -07:00
Aparna Das
85ff2a31eb gpu: nvgpu: vgpu: use ivm to send auxiliary data
RM server retrieves auxiliary data only from IVM.
Modify IVC commands to send auxiliary data to RM
server using IVM and not as a part command message.

VFND-4166

Change-Id: I9bfe33cf9301f7c70709318b810c622ec57b1cdf
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: http://git-master/r/1484130
Reviewed-by: svcboomerang <svcboomerang@nvidia.com>
Tested-by: svcboomerang <svcboomerang@nvidia.com>
2017-05-24 03:47:30 -07:00
Terje Bergstrom
7665421874 gpu: nvgpu: Replace use of bitops.h and kernel.h
Remove use of linux/kernel.h and linux/compiler.h. We don't use
anything in those headers.

Also replace use of linux/bitops.h with new wrapper nvgpu/bitops.h.

JIRA NVGPU-13

Change-Id: Iefa6b4598d5a5e7fc386c0a7a554e778a87010d6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1460777
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
2017-04-12 07:01:12 -07:00
Richard Zhao
3429657f93 gpu: nvgpu: vgpu: merge tegra_vgpu_t18x.h to tegra_vgpu.h
No need to keep two vgpu headers anymore.

Jira VFND-3796

Change-Id: I400cbfa5b2c0e62963eff247adcd9483be975379
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1457480
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-04-07 13:48:30 -07:00
Peter Daifuku
fd02ab4d54 gpu: nvgpu: vgpu: profiler reservation support
Support for hwpm reservations in the virtual case:

- Add session ops for checking and setting global and context reservations, and
  releasing reservations
- in the native case, these just update reservation counts and flags
- in the vgpu case, when the reservation count is 0, check with the RM server
  that a reservation is possible: for global reservations, no other guest
  can have a reservation; for context reservations, no other guest can have
  a global reservation
- in the vgpu case, when the reservation count is decremented to 0, notify
  the RM server that the guest no longer has any reservations

Bug 1775465
JIRA VFND-3428

Change-Id: Idf115b730e465e35d0745c96a8f8ab6b645c7cae
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1323375
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-24 09:08:17 -07:00
Aparna Das
16ee09bb59 gpu: nvgpu: vgpu: force gpu preepmtion policy
Query the RM server to retrieve gpu preemption policy
of guest based on pct configuration. If guest is not
allowed to request wfi preemption mode then set context
with either gfxp or cta preemption mode only.

Jira VFND-3079
Jira VFND-3081

Change-Id: I60cbf121d6f0e2373568cf40b3dfdb4df76fe02d
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: http://git-master/r/1280903
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Sachit Kadle <skadle@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2017-03-14 19:58:19 -07:00
Thomas Fleury
2caea7576a gpu: nvgpu: vgpu: add clear single SM error state
Add support for clearing single SM error state for CUDA debugger.
In addition to clearing local copy of SM error state,
vgpu_gr_clear_sm_error_state now sends a command to RM server
(TEGRA_VGPU_CMD_CLEAR_SM_ERROR_STATE), to clear global ESR and
warp ESR.

Bug 1791111

Change-Id: I3a1f0644787fd900ec59a0e7974037d46a603487
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1296311
(cherry picked from commit fd07e03c3d086f396e4d65575c576a4dd68c920a)
Reviewed-on: http://git-master/r/1299060
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Cory Perry <cperry@nvidia.com>
Tested-by: Cory Perry <cperry@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-09 10:44:56 -08:00
Thomas Fleury
6c35cebdcb gpu: nvgpu: vgpu: suspend/resume contexts
Add ability to suspend/resume contexts for a debug session
(NVGPU_DBG_GPU_IOCTL_SUSPEND_RESUME_CONTEXTS), in virtualized
case:
- added hal function to resume contexts.
- added vgpu support for suspend contexts, i.e. build a list
of channel ids, and send TEGRA_VGPU_CMD_SUSPEND_CONTEXTS
- added vgpu support for resume contexts, i.e. build a list
of channel ids, and send TEGRA_VGPU_CMD_RESUME_CONTEXTS

Bug 1791111

Change-Id: Icc1c00d94a94dab6384ac263fb811c00fa4b07bf
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1294761
(cherry picked from commit d17a38eda312ffa92ce92e5bafc30727a8b76c4e)
Reviewed-on: http://git-master/r/1299059
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Cory Perry <cperry@nvidia.com>
Tested-by: Cory Perry <cperry@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-09 10:44:55 -08:00
Aparna Das
28b0d6cfa8 gpu: nvgpu: remove call to invalidate tlb
Guest doesn't explicitly send command to the RM server
to invalidate tlb which is done implicitly when mapping
or unmapping buffer. Remove support for this call.

Bug 1665111

Change-Id: Icf2edae7feffa35b1dbf87c227b3e98b506e6519
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: http://git-master/r/1287728
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-02-14 11:15:27 -08:00
Aparna Das
bad0572cb1 gpu: nvgpu: vgpu: retrieve gpu load
Add support to send command to RM server to retrieve
GPU load.

Bug 200261903

Change-Id: Ie3d0ba7ec91317e9a2911f71613ad78d20f9c1fb
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: http://git-master/r/1275045
(cherry picked from commit 5a6c1de1e6997bfd803b4b95b3e44e282ba32f67)
Reviewed-on: http://git-master/r/1283279
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-24 16:24:12 -08:00
Richard Zhao
e229514bec gpu: nvgpu: vgpu: receive event TEGRA_VGPU_EVENT_SM_ESR
- allocate gr.sm_error_state
- handle event of sm error state
- add callback of clear sm error state

JIRA VFND-3291
Bug 200257899

Change-Id: I49b9437013e8c65290750b7fe21fc6819ea93b1c
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1278397
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-01-06 15:02:24 -08:00
Richard Zhao
ecc3722aa1 gpu: nvgpu: vgpu: restructure event handling
Take interrupts as one kind of event message, and make it
easier to add new kind of events.

JIRA VFND-3291
Bug 200257899

Change-Id: I83482293230c0aa10b05caf61e249a042bf6653c
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1278396
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-01-06 15:02:24 -08:00
Alex Van Brunt
aed4008ffa include: linux: import tegra_vgpu_t18x.h from kernel-t18x
include/linux/tegra_vgpu_t18x.h was missed while spliting the nvgpu driver
off. This patch imports it into the nvgpu repo.

bug 200187033

Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Change-Id: Ia46384241bd0e24a8a560c3b13b5fd3523c9cc68
Reviewed-on: http://git-master/r/1119779
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2016-12-27 15:22:11 +05:30
Sachit Kadle
c1750f45f5 gpu: nvgpu: add tsg_open HAL interface
Add HAL interface for TSG open, which is intended to
be called from the exisiting gk20a_tsg_open function.

The tsg_open entryoint is only implemented for vgpu,
as the server needs to clear metadata when a tsg is opened.

Bug 200215060

Change-Id: Icc8fd602f31e52d9fa9b2e7786b665b9e7b9294e
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1249218
(cherry picked from commit 35c86f7c796c6574d3dc336e20012ea5c16d7cb4)
Reviewed-on: http://git-master/r/1256468
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-12-19 15:39:47 -08:00
seshendra Gadagottu
7b67abb2ed gpu: nvgpu: gv11b: support for new littler values
Add support for new litter values:
GPU_LIT_NUM_SUBCTX
GPU_LIT_NUM_SM_PER_TPC

Also updated get_litter_value api to use int
instead of enum type.

JIRA GV11B-21

Change-Id: Ide06245d03743e2d757d27d045701beb25b6707b
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1254857
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-11-17 12:07:51 -08:00
Peter Daifuku
1ba169d7db Revert "Revert "gpu: nvgpu: vgpu: alloc hwpm ctxt buf on client""
This reverts commit 5f1c2bc27f.

Added back now that matching RM server has been updated:

In hypervisor mode, all GPU VA allocations must be done by client;
fix this for the allocation of the hwpm ctxt buffer

Bug 200231611

Change-Id: Ie5ce2c2562401b1f00821231d37608e3fc30d4a4
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1252138
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-11-14 15:04:22 -08:00
Sivaram Nair
5f1c2bc27f Revert "gpu: nvgpu: vgpu: alloc hwpm ctxt buf on client"
This reverts commit 57821e2157.

Change-Id: Ic4801115064ccbcd1435298a61871921d056b8ea
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/1247825
Reviewed-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Babu Bodla <rbodla@nvidia.com>
2016-11-04 08:34:18 -07:00
Peter Daifuku
57821e2157 gpu: nvgpu: vgpu: alloc hwpm ctxt buf on client
In hypervisor mode, all GPU VA allocations must be done by client;
fix this for the allocation of the hwpm ctxt buffer

Bug 200231611

Change-Id: I0270b1298308383a969a47d0a859ed53c20594ef
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1240913
(cherry picked from commit 49314d42b13e27dc2f8c1e569a8c3e750173148d)
Reviewed-on: http://git-master/r/1245867
(cherry picked from commit d0b10e84d90d0fd61eca8be0f9e879d9cec71d3e)
Reviewed-on: http://git-master/r/1246700
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-11-03 10:35:12 -07:00
Peter Daifuku
9aa7de15c2 gpu: nvgpu: vgpu: cyclestat snapshot support
Add support for cyclestats snapshots in the virtual case

Bug 1700143
JIRA EVLR-278

Change-Id: I376a8804d57324f43eb16452d857a3b7bb0ecc90
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1211547
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-09-08 16:04:09 -07:00
Richard Zhao
deffbf8ee2 gpu: nvgpu: vgpu: get constants of gpc_tpc_count/mask arrays
It'll cover multi-gpcs.

JIRA VFND-2103

Change-Id: Ie82bdaad360294696c5a679d694f6f0e2364ca2e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1194631
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:25 -07:00
Richard Zhao
ead3148816 gpu: nvgpu: vgpu: add getting gr constants
move below attributes to constants:
TEGRA_VGPU_ATTRIB_GPC_COUNT
TEGRA_VGPU_ATTRIB_MAX_TPC_PER_GPC_COUNT
TEGRA_VGPU_ATTRIB_MAX_TPC_COUNT
TEGRA_VGPU_ATTRIB_NUM_FBPS
TEGRA_VGPU_ATTRIB_FBP_EN_MASK
TEGRA_VGPU_ATTRIB_MAX_LTC_PER_FBP
TEGRA_VGPU_ATTRIB_MAX_LTS_PER_LTC

JIRA VFND-2103

Change-Id: Ic2ac14a0f8a1cf19a996bcef20bef0003d3b9a3b
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1194630
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:24 -07:00
Richard Zhao
843bbc726c gpu: nvgpu: vgpu: add getting sm version constants
move below attributes to constants:
TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH

JIRA VFND-2103

Change-Id: I5d6aa8f4a49e65307989ef02d223c3ee31fcdeed
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1190481
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:23 -07:00
Richard Zhao
233862859a gpu: nvgpu: vgpu: add getting ltc constants
move below attributes to constants:
TEGRA_VGPU_ATTRIB_COMPTAG_LINES
TEGRA_VGPU_ATTRIB_L2_SIZE
TEGRA_VGPU_ATTRIB_CACHELINE_SIZE
TEGRA_VGPU_ATTRIB_COMPTAGS_PER_CACHELINE
TEGRA_VGPU_ATTRIB_SLICES_PER_LTC
TEGRA_VGPU_ATTRIB_LTC_COUNT

JIRA VFND-2103

Change-Id: Iecf9717ee553a16ffe8de445be5bfe5a99c3a094
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1190480
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:21 -07:00
Richard Zhao
47fe8460e9 gpu: nvgpu: vgpu: add getting constants golden img size and zcull ctx size
JIRA VFND-2103

Change-Id: I180324b36a1c6b39300b92a2cff6448d7665679b
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1190479
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:20 -07:00
Richard Zhao
9730a93d8a gpu: nvgpu: vgpu: add cmd to get RM server constants
Moving getting constant attributes into one cmd which will be
called only once.

This patch adds basic infrastructure and gpu arch info, max_freq
and num_channels support.

JIRA VFND-2103

Change-Id: I100599b49f29c99966f9e90ea381b1f3c09177a3
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1189832
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-08-15 11:41:18 -07:00
Richard Zhao
823f00d484 gpu: nvgpu: vgpu: remove deprecated gr_ctx alloc/free cmd
JIRA VFND-2080

Change-Id: Ied4c1af9377a6d18c20814190b679ad98450513e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1183738
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-07-26 12:43:35 -07:00
Richard Zhao
dc137541b0 gpu: nvgpu: vgpu: add pm qos support
Send cmd to RM server to change clk rate when PM_QOS_GPU_FREQ_BOUNDS
max changes.

Bug 200206160

Change-Id: I7f19e5f711426517baf8e7f934bf41972012644b
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1172792
(cherry picked from commit 973c258fd85449c3862df2498362e358fd3682c9)
Reviewed-on: http://git-master/r/1180892
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2016-07-13 21:46:07 -07:00
Peter Daifuku
1b04326f40 gpu: nvgpu: vgpu: dbg_set_powergate support
Add support for dbg_set_powergate when virtualized

Jira VFND-1905

Change-Id: I0d81c8863b3eda4ae4fee42e5a95d2fc9d78b174
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1162048
(cherry picked from commit 0dfc55f390a10e21ae13e14dd2f16e89a3bddfa7)
Reviewed-on: http://git-master/r/1167182
(cherry picked from commit 4e34a1844558d93da5ad208532ec28aeda228f95)
Reviewed-on: http://git-master/r/1174701
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-07-06 15:26:22 -07:00
Richard Zhao
a79135eacb gpu: nvgpu: vgpu: explicitly set values for big enums
It helps when a few people add ivc cmds at same time.
It can also decouple the changes when integrating to other branches.

JIRA VFND-1903

Change-Id: I1d9b6cc0443b230dd7da4a0c1b445af2acb0487c
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1162741
(cherry picked from commit b40c06fd0ec92cba932497892a9242b702b5d3d7)
Reviewed-on: http://git-master/r/1167286
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-22 13:36:09 -07:00
Richard Zhao
22d0233d3a gpu: nvgpu: vgpu: add read ptimer support
Bug 1395833

Change-Id: Id0d427b6a1ddaecfeec33c61a6161679cf596c92
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1159588
(cherry picked from commit d33aa89420990626fb377c56ed5517a00f717c2a)
Reviewed-on: http://git-master/r/1158897
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-16 14:06:55 -07:00
Richard Zhao
3735dba6f8 gpu: nvgpu: vgpu: add general event support
Events like bpt int/pause will help cuda work properly.

Bug 200173403
VFND-1568

Change-Id: I29e534969028bf08aedd81c99f5a536779f431d1
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1159621
(cherry picked from commit a266e53c514639e15ed166e2c8ce5a55efc48eda)
Reviewed-on: http://git-master/r/1152154
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-09 15:17:41 -07:00
Richard Zhao
c624f35383 gpu: nvgpu: vgpu: add channel enable support
Bug 200173403
VFND-1568

Change-Id: I3636a77bbbbd719e961dce5ca7ca7bdd5aa33881
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1159620
(cherry picked from commit b22fb6518da15a09c3e298213af5e60b8e6907a2)
Reviewed-on: http://git-master/r/1155403
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-09 15:17:28 -07:00