Philip Elcan
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2beed190a7
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gpu: nvgpu: clk: update type for size param
Update interfaces to use size_t to align with boardobj_construct_super()
and avoid unnecessary casts.
JIRA NVGPU-1008
Change-Id: Ib4539239363f106f1fba8d523072b28d0b8369ad
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011434
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
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2019-02-11 14:04:25 -08:00 |
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Philip Elcan
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75e4e7c9bc
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gpu: nvgpu: clk: address MISRA 10.3 violations
This fixes a number of miscellaneous MISRA 10.3 violations in
common/pmu/clk/ for assignment of objects of different size or essential
type.
JIRA NVGPU-1008
Change-Id: If93aa9fc4f0f49ea678e39111f323ef4d53f5ec5
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2008771
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-02-01 13:45:22 -08:00 |
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Terje Bergstrom
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dce78f7332
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gpu: nvgpu: Move PMU code to common/pmu
Move code interfacing with PMU tasks to common/pmu.
JIRA NVGPU-961
Change-Id: Ie62611b0ffe1196d4bfdc740e03017e1894a834f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1950991
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2019-01-10 20:09:55 -08:00 |
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