Commit Graph

7 Commits

Author SHA1 Message Date
Sai Nikhil
34ef8ee49f gpu: nvgpu: fix Misc MISRA Rule 10.4 Violations
MISRA Rule 10.4 only allows the usage of arithmetic operations on
operands of the same essential type category.

Adding "U" at the end of the integer literals to have same type of
operands when an arithmetic operation is performed.

This fixes violation where an arithmetic operation is performed on
signed and unsigned int types.

JIRA NVGPU-992

Change-Id: Icb724f3424c8161c12b69d373ff08c7648f79e56
Signed-off-by: Sai Nikhil <snikhil@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1834225
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-12-13 07:14:49 -08:00
Amurthyreddy
b68e465fab gpu: nvgpu: MISRA 10.1 boolean fixes
MISRA rule 10.1 doesn't allow the usage of non-boolean variables as
booleans. Fix violations where a variable of type non-boolean is used
as a boolean.

JIRA NVGPU-646

Change-Id: If451037ada9a5f41b0cddb50778de57f60864f5c
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1815742
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-11-13 09:45:07 -08:00
Sagar Kamble
e67bb65025 gpu: nvgpu: update macro defines for MISRA 27.9
Address MISRA Rule 20.7 violation: Macro parameter expands into an
expression without being wrapped by parentheses.

Some of the exception the coverity is not able to catch are:
1. Macro parameters passed as parameter to another macro.
   i.e NVGPU_ACCESS_ONCE. Fixing these by additional parantheses.
2. Macro parameter used as type. i.e. type parameter in container_of.

While at it, update copyright date rage for list.h and types.h.

JIRA NVGPU-841

Change-Id: I4b793981d671069289720e8c041bad8125961c0c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1929823
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-23 15:44:41 -07:00
Debarshi Dutta
032860d8de gpu: nvgpu: move header location of gk20a.h
change the path of gk20a.h to <nvgpu/gk20a.h> for files in the
following directories.

gp106/
gv100/

Jira NVGPU-597

Change-Id: I098c12c34cdce764e6fca4ea1d16c5f8dee81026
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1836707
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-24 21:18:17 -07:00
Debarshi Dutta
82a90170d3 gk20a: nvgpu: Remove io.h dependency from gk20a.h
In the current code, gk20a.h includes io.h which gets directly included
in a lot of other files. io.h contains methods which uses a struct
gk20a as a parameter leading to a circular dependency between io.h
and gk20a.h. This can be mitigated by removing io.h from gk20a.h as
part of larger effort to moving gk20a.h to nvgpu/gk20a.h

JIRA NVGPU-597

Change-Id: I93e504fa9371b88152737b342a75580c65e8f712
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1787316
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-07-30 11:24:06 -07:00
Terje Bergstrom
dec8625b88 gpu: nvgpu: Move SW scratch register read to bus
SW scratch register is in bus register range. Move query of that
register to bus HAL from bios.

JIRA NVGPU-588

Change-Id: I69f35af3d5f8da3550eb68fe7d060a3ec48ce275
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1730898
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-06-14 06:44:07 -07:00
David Nieto
f518304e0d gpu: nvgpu: fix GV100 hal definitions
These changes allow GV100 to init the basic HALs to pass
nvgpu_submit_twod

(1) Allocate fault buffer from vidmem instead of sysmem to prevent coherency
issues
(2) Properly enable FB
(3) Fan control requires the execution of the pre-os FW, without it the SKU201
is extremely noisy

 JIRA: NVGPUGV100-9

Change-Id: I9b2072737e45432f957e7faae6d33bc0ab43b817
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1539926
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-10 12:05:41 -07:00