Commit Graph

57 Commits

Author SHA1 Message Date
Konsta Holtta
e83372e0cc gpu: nvgpu: gv11b: abstract away dma alloc attrs
Don't use gk20a_gmmu_free_attr because the attrs are embedded in struct
mem_desc now.

Bug 1853519

Change-Id: Iaa4309d4c2cd334346e09c4fbf15ce826f2ff640
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1321314
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-21 15:01:48 -07:00
Alex Waterman
4b09997772 nvgpu: gpu: HW header update for Volta
Similar HW header update as has been done for all the other chips.
HW header files are located under:

  drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/

And can be included like so:

  #include <nvgpu/hw/gv11b/hw_gr_gv11b.h>

Bug 1799159

Change-Id: If39bd71480a34f85bf25f4c36aec0f8f6de4dc9f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1284433
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-24 15:15:16 -08:00
seshendra Gadagottu
331762a7e7 gpu: nvgpu: gv11b: implement mm_setup_hw
Reuse gk20a_mm_setup_hw for gv11b.

JIRA GV11B-21

Change-Id: I5141dbb8088799a8bd5df55469bc371b63497e96
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1254939
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-11-29 10:44:51 -08:00
seshendra Gadagottu
1eb564a279 gpu: nvgpu: gv11b: chip specific init_inst_block
Remove va limits for inst block in gv11b.

JIRA GV11B-21

Change-Id: I5338e2d64b3bbebeb5e309d63db3e8360ae05723
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1254880
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-11-21 08:50:49 -08:00
seshendra Gadagottu
2de62a6083 gpu: nvgpu: gv11b: fix sparse warning
Fix following sparse warning my making funtion as static:

$TOP/kernel/nvgpu-t19x/drivers/gpu/nvgpu/gv11b/mm_gv11b.c:23:6:
warning: symbol 'gv11b_mm_is_bar1_supported' was not declared.
Should it be static?

Bug 200088648

Change-Id: I4af7ed1ae112813887a14a11b8fcea0b72c90e39
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1236689
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-10-17 14:46:26 -07:00
seshendra Gadagottu
1a36091fb9 gpu: nvgpu: gv11b: sysmem userd support
For gv11b, userd is allocated from sysmem.
Updated gp_get and gp_put functions to read or
write from sysmem instead of bar1 memory.

In gv11b, after updating gp_put, it is required
to notify pending work to host through channel
doorbell.

JIRA GV11B-1

Change-Id: Iebc52e6ccfc8b9ca0c57b227190e0ce1161076f1
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1226613
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-10-11 09:16:04 -07:00
Seshendra Gadagottu
c84ddceda6 gpu: nvgpu: gv11b: sm priv reg related changes
Included all basic ops for gv11b and updated
sm related functions to include new priv register
addresses.

Bug 1735757

Change-Id: Ie48651f918ee97fba00487111e4b28d6c95747f5
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1126961
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-16 07:48:28 -07:00