Commit Graph

10 Commits

Author SHA1 Message Date
Konsta Holtta
237cee5997 gpu: nvgpu: move chip specific runlist code to common
Extract out the HAL ops' implementation that now belongs to the runlist
unit.

Jira NVGPU-1309

Change-Id: I66185de0ddace1728da5f55ae11daa0b752bebf1
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1997824
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-24 04:14:40 -08:00
Konsta Holtta
6fda25e958 gpu: nvgpu: move runlist HAL ops to separate section
Split out ops that belong to runlist unit to a new section called
runlist. This is effectively just renaming; the implementation still
stays put.

Jira NVGPU-1309

Change-Id: Ib928164f8008f680d9cb13c969e3304ef727abba
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1997823
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-24 04:14:31 -08:00
Konsta Holtta
bca54edb08 gpu: nvgpu: unit: use array for a lone tsg
test_tsg_format_gen() uses a single tsg and passes its address on to be
used as an array (of a single element). Reduce confusion by using a
single-element tsg array already instead of a plain tsg.

Coverity ID 8335811

Change-Id: I0135bcabeed12474beb9c52c9d186de1676b5423
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1996287
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-16 09:55:07 -08:00
Konsta Holtta
e05c0d13a0 gpu: nvgpu: add runlist unit to common
Extract non-chip-specific code that manages the runlists (init, update,
reschedule etc.) to a new file in the common directory. Move the
declarations to a new matching runlist.h header.

Jira NVGPU-1309

Change-Id: I3c7e0032899516487037f47ddc9a7e7aa4b0b33a
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1978058
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-04 11:15:34 -08:00
Konsta Holtta
7a4c2f050f gpu: nvgpu: unit: add inactive channel runlist test
Cover the case where a tsg has channels that are not in the active map
of the runlist.

Jira NVGPU-1174

Change-Id: I63e71b5a295a427d9fab351f3b610134c72b040a
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1975382
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-12-19 19:44:36 -08:00
Konsta Holtta
517b901f5f gpu: nvgpu: unit: test tsg timeslice, split fmt tests
Cover the nondefault path of tsg timeslice settings and split out the
three tsg format checks to be separate tests so that the timeslice test
fits in nicely.

Jira NVGPU-1174

Change-Id: Icaa99de81392a4b811247c5ca32526e22a61da84
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1975381
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-12-19 19:44:32 -08:00
Konsta Holtta
8ca9f3a8cb gpu: nvgpu: unit: use args for runlist interleaving
The interleaving tests (full and oversize) are very similar in code. Add
common args struct for them and have just one function to process args.

Jira NVGPU-1174

Change-Id: I535aeb020454d3f87ad1148560f29ca7fff4ae2d
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1975380
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-12-19 19:44:28 -08:00
Konsta Holtta
e315011691 gpu: nvgpu: unit: align runlist test naming
A last minute fix in the runlist construction code rework reorganized
the order such that the ringbuf list starts with the highest level, not
lowest. Some tests were not updated though. Adjust comments and naming
to indicate what the tests really do, and add one more test to cover all
branches in the interleaved construction logic.

Jira NVGPU-1174

Change-Id: If608a35be2c5cf8f400df6673cd10c983ab91845
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1975379
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-12-19 19:44:25 -08:00
Alex Waterman
63da5366a6 gpu: nvgpu: unit: Shuffle the paths of tests around a bit
We will need to organize the unit tests in order to keep the
units/ directory managable.

The basic idea here is to mirror the common/ structure in
nvgpu proper under units/. There's one additrion at the
moment though: posix. This is for posix environment related
tests.

Also added a fix for the runlist unit test. Add it to the
tmake sources and move the nvgpu-runlist/ directory to just
runlist/.

Change-Id: I1f4163d0e33c3af70376cfeb3441d277d559e05a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1935710
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-11-07 13:10:55 -08:00
Konsta Holtta
472f8d1352 gpu: nvgpu: unit: add runlist construction tests
Test that the runlist construction formats tsg items as expected and in
correct order, in particular when interleaving is enabled and tsgs of
different interleave levels exist.

Jira NVGPU-1174

Change-Id: I9c88a618ce8bf5b0555b39a876cda98f6d887a01
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1918227
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-26 11:14:23 -07:00