Commit Graph

201 Commits

Author SHA1 Message Date
Terje Bergstrom
4f5996e23d gpu: nvgpu: Remove MC accesses from gk20a.c
Clean up gk20a.c by removing direct accesses to MC and moving the
accesses to happen via MC HAL.

The chip detection logic has to violate the HAL and call gk20a
version directly, because HAL ops cannot be set up before chip has
been identified.

Change-Id: I4cdd0ef3fcf7d3b561a3fca4247a8356fe8d18e1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1321576
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-26 09:55:15 -07:00
David Nieto
2a502bdd5f gpu: nvgpu: pass gk20a struct to gk20a_busy
After driver remove, the device structure passed in gk20a_busy can be
invalid. To solve this the prototype of the function is modified to pass
the gk20a struct instead of the device pointer.

bug 200277762
JIRA: EVLR-1023

Change-Id: I08eb74bd3578834d45115098ed9936ebbb436fdf
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1320194
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-03-23 21:05:35 -07:00
Konsta Holtta
8f3875393e gpu: nvgpu: abstract away dma alloc attrs
Don't use enum dma_attr in the gk20a_gmmu_alloc_attr* functions, but
define nvgpu-internal flags for no kernel mapping, force contiguous, and
read only modes. Store the flags in the allocated struct mem_desc and
only use gk20a_gmmu_free, remove gk20a_gmmu_free_attr. This helps in OS
abstraction. Rename the notion of attr to flags.

Add implicit NVGPU_DMA_NO_KERNEL_MAPPING to all vidmem buffers
allocated via gk20a_gmmu_alloc_vid for consistency.

Fix a bug in gk20a_gmmu_alloc_map_attr that dropped the attr
parameter accidentally.

Bug 1853519

Change-Id: I1ff67dff9fc425457ae445ce4976a780eb4dcc9f
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1321101
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-21 15:01:47 -07:00
Terje Bergstrom
589d6385b1 gpu: nvgpu: Implement get_rate/set_rate as GPU op
Move clock APIs from gk20a_platform to gpu_ops. At the same time
allow use of internal get_rate/set_rate for querying both GPCCLK
and PWRCLK on iGPU.

At the same time we can replace calls to clk framework with the
new HAL and drop direct dependency to clk framework.

gp10b ops were replaced as a whole at HAL initialization. That
replaces anything set in platform probe stage, so reduce that to
touch only clock gating regs.

Change-Id: Iaf219b1f000d362dbf397d45832f52d25463b31c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1300113
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-16 11:48:29 -07:00
Vijayakumar
b0973391d0 gpu: nvgpu: add pmu trace support for dgpus
1) Trace buffer allocation now calls generic gmmu alloc/map.
  so for dGPUs they are allocated in vidmem and iGPUs they
are allocated in sysmem

2) Use pmu surface mechanism to setup trace buffer params as
dGPU binaries follow falcon memory structure to get mem surface
params

3) Fix minor coverity issue by removing unnecessary overwrite
of count variable in trace print function

JIRA DNVGPU-217

Coverity ID 2431386

Change-Id: I2ae49a4e0450481cde2a778447c270a796681dad
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1312404
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-07 00:10:50 -08:00
Alex Waterman
76b78b6fdc gpu: nvgpu: Remove nvgpu_gpuid_t18x.h
Remove nvgpu_gpuid_t18x.h since this file is now visible. Migrate
the relevant definitions and defines into their expected places and
make the code use the real defines. No longer is hiding t18x specific
stuff necessary.

Bug 1799159

Change-Id: I47fa2392e46fdb7aacc70aeb0cc8c3f5ca0dc22f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1300976
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-02 18:48:41 -08:00
Deepak Goyal
d6e40fc07a nvgpu: gpu: pmu: Use pmu ops to call pmu_reset().
In this patch hard coded function calls for PMU
reset are replaced by PMU ops.

Change-Id: I266c43e3540163a133895244dcf91169116812f5
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: http://git-master/r/1303757
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-02-23 21:33:33 -08:00
Deepak Nibade
8ee3aa4b31 gpu: nvgpu: use common nvgpu mutex/spinlock APIs
Instead of using Linux APIs for mutex and spinlocks
directly, use new APIs defined in <nvgpu/lock.h>

Replace Linux specific mutex/spinlock declaration,
init, lock, unlock APIs with new APIs
e.g
struct mutex is replaced by struct nvgpu_mutex and
mutex_lock() is replaced by nvgpu_mutex_acquire()

And also include <nvgpu/lock.h> instead of including
<linux/mutex.h> and <linux/spinlock.h>

Add explicit nvgpu/lock.h includes to below
files to fix complilation failures.
gk20a/platform_gk20a.h
include/nvgpu/allocator.h

Jira NVGPU-13

Change-Id: I81a05d21ecdbd90c2076a9f0aefd0e40b215bd33
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1293187
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-02-22 04:15:02 -08:00
Terje Bergstrom
6a58857b65 gpu: nvgpu: Remove almost all gm204/gm206 support
Remove gm204/gm206 support. It was used only in the interim until
Pascal cards were available, and we don't maintain that code anymore.

This patch leaves only BIOS code.

Change-Id: I215988603d4588ef710bdda6e47449e9235e78ac
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1302224
GVS: Gerrit_Virtual_Submit
2017-02-17 13:46:32 -08:00
Alex Waterman
aa36d3786a gpu: nvgpu: Organize semaphore_gk20a.[ch]
Move semaphore_gk20a.c drivers/gpu/nvgpu/common/ since the semaphore
code is common to all chips.

Move the semaphore_gk20a.h header file to drivers/gpu/nvgpu/include/nvgpu
and rename it to semaphore.h. Also update all places where the header
is inluced to use the new path.

This revealed an odd location for the enum gk20a_mem_rw_flag. This should
be in the mm headers. As a result many places that did not need anything
semaphore related had to include the semaphore header file. Fixing this
oddity allowed the semaphore include to be removed from many C files that
did not need it.

Bug 1799159

Change-Id: Ie017219acf34c4c481747323b9f3ac33e76e064c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1284627
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-02-13 18:14:45 -08:00
Alex Waterman
b9194a1c33 gpu: nvgpu: Organize nvgpu_common.[ch]
Move nvgpu_common.c to drivers/gpu/nvgpu/common since it is a common
C file to all drivers.

Similarly move nvgpu_common.h to drivers/gpu/nvgpu/include/nvgpu since
this follows the new include guidelines.

Bug 1799159

Change-Id: I00ebed289973b27704c2cff073526e36505bf699
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1284612
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
2017-02-13 18:14:34 -08:00
Alex Waterman
8c3dddd81f gpu: nvgpu: Fix more pmu circular dependencies
Similar to patch 67fc462989 fix
more circular dependencies arising from #include'ing gk20a.h
for no apparent reason.

Bug 200192125

Coverity ID 2011397
Coverity ID 2011398

Change-Id: I75bcb3e4e66b680498b0e20d645ab9543aae6697
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1296947
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-02-07 14:54:02 -08:00
Terje Bergstrom
fa3f8cc101 gpu: nvgpu: Remove circular dependency in PMU includes
Remove including gk20a.h from pmu_gk20a.h. This causes a fallout
as some #includes were missing.

gr_gp10b.h uses mem_desc, but did not include mm_gk20a.h. Add the
include.

Including mm_gk20a.h in gr_gp10b.h causes recursive include, as
mm_gk20a.h has some gr defines. Move the defines to gr_gk20a.h to
remove the dependency.

gr_ctx_gk20a.h used struct gk20a pointers, but did not forward
declare it. Add a forward declaration.

gr_gk20a.h uses dbg_session_gk20a, but was missing forward
declaration.

gr_gk20a.h did not include nvgpu.h but it uses preemption types from
that header. Add include.

Change-Id: I2168e2303b55e0d187b816bcb26f37c8af1649ba
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1283717
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
2017-01-27 10:53:25 -08:00
Deepak Goyal
bbea338b44 nvgpu: pmu: Update perfmon unit ID for T19x.
update perfmon id for t19x in get_perfmon_id().

JIRA GV11B-30

Change-Id: I7c76b49cc47f8de1e6fa9492e2986830dcff901f
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: http://git-master/r/1284763
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-18 16:47:25 -08:00
Deepak Goyal
a69fa0e96c nvgpu: pmu: Use ops to get PMU queue HEAD/TAIL.
pmu_queue_head() & pmu_queue_tail() are updated
to use gops to include chip specific PMU queue
head/tail registers.

JIRA GV11B-30

Change-Id: I9c3d6a4601ba2767f9ada95642052044e2b79747
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: http://git-master/r/1283266
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-18 16:46:50 -08:00
Deepak Goyal
eba4aba00c nvgpu: pmu: Add support for new PMU ucode.
-GV11B PMU ucode is added in nvgpu supported
 ucodes.
-PMU INIT msg structure(v4) is added

JIRA GV11B-30

Change-Id: Ifced87b1ca2692c277ae11f562cb36b328da3fe4
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: http://git-master/r/1259274
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-18 16:46:27 -08:00
Mahantesh Kumbar
9c0c4dcf3f gpu: nvgpu: Added lpwr_debug debugfs node
- lpwr_debug node to dump current pstate &
 PG status.

JIRA DNVGPU-165

Change-Id: I8240aea7145c3016946f4322fe0781d78ee2ec73
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1253509
(cherry picked from commit 4852997df5b89aeb8544ed9092ccc9ee8b8c375e)
Reviewed-on: http://git-master/r/1271618
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-01-17 08:15:13 -08:00
Mahantesh Kumbar
efe0758081 gpu: nvgpu: fix pmu->mscg_stat optimization issue
- with help of WRITE_ONCE() & ACCESS_ONCE()
  make sure variable pmu->mscg_stat read/write goes through
  without optimization
- Added WRITE_ONCE() define for kernel-3.18 version & below
  to support backward compatibility

issue: inconsistencies on getting MSCG to trigger consistently in P5
due to a lack of memory barrier around and volatile accesses to the
variable pmu->mscg_stat

JIRA DNVGPU-71

Change-Id: I04d30493d42c52710304dbdfb9cb4a1e9a76f2c0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1252524
(cherry picked from commit 8af7fc68e7ab06a856ba4ef4e44de7336682361b)
Reviewed-on: http://git-master/r/1271614
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-01-17 08:15:12 -08:00
Mahantesh Kumbar
c8d82d465c gpu: nvgpu: HAL to query LPWR feature support
HAL to query LPWR feautre's RPPG/MSCG support
based on current pstate configured.

JIRA DNVGPU-71

Change-Id: I58a34c6dca68e3eb76e222bd781578bf682eac34
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1283916
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-01-16 04:53:38 -08:00
Alex Waterman
b928f10d37 gpu: nvgpu: Start re-organizing the HW headers
Reorganize the HW headers of gk20a. The headers are moved to a
new directory:

  include/nvgpu/hw/gk20a

And from the code are included like so:

  #include <nvgpu/hw/gk20a/hw_pwr_gk20a.h>

This is the first step in reorganizing all of the HW headers for
gm20b, gm206, etc. This is part of a larger effort to re-structure
and make the driver more readable and scalable.

Bug 1799159

Change-Id: Ic151155cbc2e6f75009f2d9d597b364a1bed2c4c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1244790
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-11 12:44:14 -08:00
Mahantesh Kumbar
318524ee2f gpu: nvgpu: set PMU "queue full" as debug message
Queue full message is not an error, it informs queue is full
& wait till it gets space in queue to upload pending request.

Bug 200256603

Change-Id: I14f4196b391cd54e1b9616f0555a5ce0856af428
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1260494
(cherry picked from commit e7360fb52b2030c9c68aa5ed06ecd7c32b47a8c5)
Reviewed-on: http://git-master/r/1271619
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-10 20:16:10 -08:00
Mahantesh Kumbar
7552780739 gpu: nvgpu: pg mscg state update
- Added mscg_transition_state to know
 mscg allow/disallow status
- reused ELPG state transition defines
 for mscg state transition

JIRA DNVGPU-71

Change-Id: Ie0214a174ceecf7e97a1086f53fd965b0b655d14
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1253508
(cherry picked from commit 726dde9cff1da38525518a91e756598a5ab71f73)
Reviewed-on: http://git-master/r/1271617
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-10 20:16:05 -08:00
Mahantesh Kumbar
d8049d384f gpu: nvgpu: pmu->pmu_state update
- set pmu->pmu_state to PMU_STATE_ELPG_BOOTED
 only for ELPG after PMU_STATE_ELPG_BOOTING
 state

Bug N/A

Change-Id: I08480e2afd5a5050a903327b91e43b25780cdaf8
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1254429
(cherry picked from commit d68f4f91796d1d98dbc1b5b24d526fe2e487966f)
Reviewed-on: http://git-master/r/1271616
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-10 20:15:59 -08:00
Lakshmanan M
8d712cd235 gpu: nvgpu: Add thermal alarm notification for UMD
Added the thermal alarm notification handling for UMD

JIRA DNVGPU-130
Bug 200231080

Change-Id: I034c7b35a18a091ef7659ff992f1950576623cad
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1251760
(cherry picked from commit 9e66f2e2f7fbcab29e25c976c1d5fa29671afcd0)
Reviewed-on: http://git-master/r/1282084
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-10 15:23:36 -08:00
Mahantesh Kumbar
f3e0dba8bf gpu: nvgpu: pg stat read update
- Added struct pmu_pg_stats_data to extract
data from multiple version of pmu pg statistics

- Added pmu_pg_stats_v2 interface to fetch
PG statistics data from PMU

- Added MSCG debugfs node to read mscg
statistics from PMU.

- Added pmu_elpg_statistics HAL support for
  gp106 PG statistics read.

- Made changes to gp104/gp106
  pmu_elpg_statistics HAL to support
  for struct pmu_pg_stats_data

JIRA DNVGPU-165

Change-Id: I2b9e89c0fae90deb45006c4478170b9a97b56603
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1252798
(cherry picked from commit 3c073b15fd991db8d65b3171b02c161294be40cd)
Reviewed-on: http://git-master/r/1271615
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-10 09:24:06 -08:00
Lakshmanan M
eaeb5ff20f gpu: nvgpu: Add thermal alert event handling
* Added the thermal alert event handling
* Added the thermal alert event PMU RPC

JIRA DNVGPU-130
Bug 200231080

Change-Id: If5ff2704e5aa6ad2f25123f72c3049a311dae5dc
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1248964
(cherry picked from commit 1850e5a9b9dfa2f9df634e2f284ab282ad9f7fc8)
Reviewed-on: http://git-master/r/1253452
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-10 03:54:56 -08:00
Alex Waterman
6df3992b60 gpu: nvgpu: Move allocators to common/mm/
Move the GPU allocators to common/mm/ since the allocators are common
code across all GPUs. Also rename the allocator code to move away from
gk20a_ prefixed structs and functions.

This caused one issue with the nvgpu_alloc() and nvgpu_free() functions.
There was a function for allocating either with kmalloc() or vmalloc()
depending on the size of the allocation. Those have now been renamed to
nvgpu_kalloc() and nvgpu_kfree().

Bug 1799159

Change-Id: Iddda92c013612bcb209847084ec85b8953002fa5
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1274400
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-09 12:33:16 -08:00
Mahantesh Kumbar
98e349ab7e gpu: nvgpu: PG statistics update
- PG statistics read support for multiple engines
- updated stat_dmem_offset member to array to hold
  dmem offset of PG engines
- PMU allocates memory in DMEM for each PG engine requested,
  updated gk20a_pmu_get_elpg_residency_gating() to get
  engine statistics for requested PG engine

JIRA DNVGPU-71

Change-Id: I2ddade37f85716f757bf33034dbff816184577eb
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1250506
(cherry picked from commit 68ba7a97d6662b87d0e489365d8afb8e2d237a03)
Reviewed-on: http://git-master/r/1270972
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-25 22:20:09 -08:00
Mahantesh Kumbar
71fbfdb2b8 gpu: nvgpu: MSCG support
- Added enable_mscg, mscg_enabled & mscg_stat flags,
  mscg_enabled flag can be used to controll
  mscg enable/disable at runtime along with mscg_stat flag.
- Added defines & interface to support ms/mclk-change/post-init-param
- Added defines for lpwr tables read  from vbios.
- HAL to support post init param which is require
  to setup clockgating interface in PMU & interfaces used during
  mscg state machine.
- gk20a_pmu_pg_global_enable() can be called when pg support
  required to enable/disable, this also checks & wait
  if pstate switch is in progress till it complets
- pg_mutex to protect PG-RPPG/MSCG enable/disable

JIRA DNVGPU-71

Change-Id: If312cefc888a4de0a5c96898baeaac1a76e53e46
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247554
(cherry picked from commit e6c94948b8058ba642ea56677ad798fc56b8a28a)
Reviewed-on: http://git-master/r/1270971
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-25 22:20:09 -08:00
Mahantesh Kumbar
75e52218ce gpu: nvgpu: PG engines init/allow/disallow update
- pmu_init_powergating loops & init multiple
  PG engines based on PG engines supported
- generalize pg init param HAL to support
  multiple PG-engine init based on PG engine
  parameter
- HAL's to return supported PG engines on chip &
  its sub features of engine.
- Send Allow/Disallow for PG engines which are
  enabled & supported.
- Added defines for pg engines

JIRA DNVGPU-71

Change-Id: I236601e092e519a269fcb17c7d1c523a4b51405f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247409
(cherry-picked from commit 1c138cc475bac7d3c3fbbd5fb18cfcb2e7fdf67a)
Reviewed-on: http://git-master/r/1269319
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-12-20 15:15:46 -08:00
Konsta Holtta
92fe000749 gpu: nvgpu: rename timeout_check to timeout_expired
Change "check" to "expired" in nvgpu_timeout_check* and append _expired
to nvgpu_timeout_peek to clarify what the boolean-like return value
means and thus avoid bugs.

Bug 200260715

Change-Id: I47e097ee922e856005a79fa9e27eddb1c8d77f8b
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1269366
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-12-19 15:40:36 -08:00
Vijayakumar
8ef013e36e gpu: nvgpu: handle vf curve change due to temp
JIRA DNVGPU-129

1)Add function hook for PMU VFE event handler which will do for VF
curve re-evaluation

2)Add function hook to send temperature limit of GPU sensor

3)Call VFE event handler from PMU's event handle function

Change-Id: I2e3577d3d895e97e6ad06e92f0f4827f9855d0b6
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1245393
(cherry picked from commit 1a5c6c32cdec73fb23735430f43577eda675e5af)
Reviewed-on: http://git-master/r/1268060
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-12-15 10:15:10 -08:00
Alex Waterman
4dc977e25f gpu: nvgpu: Use timeout API in PMU code
Instead of using custom code for timeout monitoring use the generic
timeout API for nvgpu.

Bug 1799159

Change-Id: If77e67b2d8678b824d6948620003d3892d5f41d2
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1255865
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-05 16:16:17 -08:00
Terje Bergstrom
d29afd2c9e gpu: nvgpu: Fix signed comparison bugs
Fix small problems related to signed versus unsigned comparisons
throughout the driver. Bump up the warning level to prevent such
problems from occuring in future.

Change-Id: I8ff5efb419f664e8a2aedadd6515ae4d18502ae0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1252068
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-11-16 21:35:36 -08:00
Lakshmanan M
e580e68f23 gpu: nvgpu: fix sparse error
Issue:
warning: symbol 'pmu_allocation_get_fb_size_v3' was not declared.
Should it be static?

Fix:
Declare the 'pmu_allocation_get_fb_size_v3' as static

Bug 200067946

Change-Id: If93e074ecc041e33f91cb46913f6632bf32f48f0
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1250905
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-11-11 08:21:24 -08:00
seshendra Gadagottu
161b61e6cc gpu: nvgpu: pmu HAL update
Update pmu HAL to check for pmu support.
pmu initialization will check for pmu support in
that platform.

JIRA GV11B-21

Change-Id: Ib55be58a1540862b7a91a6162544d10be85b5eb4
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1243911
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-11-01 11:36:51 -07:00
Alex Waterman
2fa54c94a6 gpu: nvgpu: Remove global debugfs variable
Remove a global debugfs variable and instead save the allocator
debugfs root node in the gk20a struct.

Bug 1799159

Change-Id: If4eed34fa24775e962001e34840b334658f2321c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1225611
(cherry picked from commit 1908fde10bb1fb60ce898ea329f5a441a3e4297a)
Reviewed-on: http://git-master/r/1242390
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-10-26 11:10:01 -07:00
Lakshmanan M
eca45ed722 gpu: nvgpu: Add proper memset size during cleanup
This CL covers the following small modifications,
1) Add proper memset size handling during pmu surface cleanup
2) Reset the pmu surface mem desc pointer after deallocate the memory

JIRA DNVGPU-47

Change-Id: I400f8c4d3f5dc650d4fc6669cef6a1e41a70f4ab
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1220100
(cherry picked from commit 1f171b977be51db20c2dfc56b3f6e3dd6b4b9095)
Reviewed-on: http://git-master/r/1240881
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-10-25 11:14:49 -07:00
Terje Bergstrom
697fe17dd6 gpu: nvgpu: Suppress error msg from VBIOS overlay
Suppress error message when nvgpu tries to load VBIOS overlay, but
one is not found. This situation is normal. This is done by moving
gk20a_request_firmware() to be nvgpu generic function
nvgpu_request_firmware(), and adding a NO_WARN flag to it.

Introduce also a NO_SOC flag to suppress attempt to load firmware
from SoC specific directory in addition to the chip specific
directory. Use it for dGPU firmware files.

Bug 200236777

Change-Id: I0294d3308f029a6a6d3c2effa579d5f69a91e418
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1223840
(cherry picked from commit cca44c3f010f15918cdd2259c15170ba1917828a)
Reviewed-on: http://git-master/r/1233353
GVS: Gerrit_Virtual_Submit
2016-10-09 13:03:35 -07:00
Vijayakumar
8de7ea2543 gpu: nvgpu: fix init msg param handing
bug 1809509

latest pmu now returns information about 3 queues
only. nvgpu pmu driver still support 5 queues to
be compatible with older firmware. handling this
properly

Change-Id: I4bc166712465f4b52537c97e6d254760c59e0d16
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1215533
(cherry picked from commit c7428c031a095b2d42512b7a8a0a9d818290e376)
Reviewed-on: http://git-master/r/1231040
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-10-07 01:36:04 -07:00
Vijayakumar
8b6eb6f118 gpu: nvgpu: fix sparse errors
bug 200067946

Change-Id: I50de1cda004c08b5a4af3fb06a3970c35197f419
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1230622
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-10-06 23:37:34 -07:00
Vijayakumar Subbu
b17d9708c9 gpu: nvgpu: Add dGPU clocks support
JIRA DNVGPU-45

Change-Id: I237ce81e31b036c05c82d46eea8694ffe1c2e3df
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1205849
(cherry picked from commit 9a4006f76b75a8ad525e7aa5ad1f609aaae49126)
Reviewed-on: http://git-master/r/1227256
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-29 13:17:46 -07:00
Terje Bergstrom
27b47b1969 gpu: nvgpu: Use bitmap allocator for PMU DMEM
Switch from buddy to bitmap allocator for PMU DMEM. PMU DMEM is small
and we cannot allocate it sparsely.

JIRA DNVGPU-85

Change-Id: Ia23d25abab593fb0d92a2329d9878da7a72bc6ca
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1203974
(cherry picked from commit 78216c9d5f0974f94ce0f818db854ef08211d4e4)
Reviewed-on: http://git-master/r/1222682
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-27 13:22:43 -07:00
Vijayakumar
4ae85fd8c9 gpu: nvgpu: fix handling of return data in pmu messages
Irrespective generic MSG ptr, pick up data that PMU sends
as response to commands

JIRA DNVGPU-85

Change-Id: I97dd2abcd9e2a7ad7bfe1270f9905a5b69e196f3
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1205119
Reviewed-on: http://git-master/r/1205447
(cherry picked from commit b1130124157acb2cfb4d04a0dd6ee8c4c0c830e5)
Reviewed-on: http://git-master/r/1222684
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-18 23:34:21 -07:00
Vijayakumar Subbu
4894ebbda5 gpu: nvgpu: fix pmu msg and command queue init
Offset needs to be calculated for individual queues
from init ack content

Bug 200229814

Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Change-Id: I93276b9cbab48e7fc42fb6c2a8edf382afb82f71
Reviewed-on: http://git-master/r/1202291
(cherry picked from commit 0e0abd478a13a5163e2b83d07307ed7136c4920e)
Reviewed-on: http://git-master/r/1205442
(cherry picked from commit f402cc2a9d0be05b5b95d5d0acbfc66f3b78b309)
Reviewed-on: http://git-master/r/1222683
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-18 23:34:13 -07:00
Mahantesh Kumbar
3351916f56 gpu: nvgpu: update mclk support
- Update payload interface to support mclk
- Call mclk after gr init complete

JIRA DNVGPU-85

Change-Id: I14c5c6cb438f1a7d56d96daa0fafc09d6abef46b
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1205461
(cherry picked from commit f1bf1ec946aaacae40ecb405341eb2e169cf5754)
Reviewed-on: http://git-master/r/1217989
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-18 23:33:56 -07:00
Mahantesh Kumbar
38e2722024 gpu: nvgpu: Vidmem support for PMU
Add vidmem support for PMU. Introduces pmu_surface, which abstracts
the memory used, and allocator helpers for both sysmem and vidmem.

JIRA DNVGPU-85

Change-Id: I61ce137c7007d82010e900759bf8acaf31fba286
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1196518
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1203125
(cherry picked from commit 665f5748108c50fe0c9b4c1486b9d74869477668)
Reviewed-on: http://git-master/r/1217628
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-18 23:33:47 -07:00
David Nieto
24c38aed59 gpu: nvgpu: fix pmu_copy_to_dmem spew
The error check was not taking account of
the DMEM address wrap-around

JIRA DNVGPU-34

Change-Id: Ibfed5532c3ee785b3061e6837f012939118a7ece
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1206460
(cherry picked from commit 080953c20f91068ccaaa564d9492a1582ffa28fe)
Reviewed-on: http://git-master/r/1218297
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-09-12 16:06:44 -07:00
Terje Bergstrom
7d44a8d8d8 gpu: nvgpu: Support mclk initialization
Add ops for calling mclk initialization.

JIRA DNVGPU-85

Change-Id: I2e9da80fdb014d916b40513d605c38711818d2f6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1203975
(cherry picked from commit 9be482c4ece7ffc550ae19f133638c808b3a768f)
Reviewed-on: http://git-master/r/1217300
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-08 20:06:06 -07:00
Alex Waterman
b6569319c7 gpu: nvgpu: Support multiple types of allocators
Support multiple types of allocation backends. Currently there is
only one allocator implementation available: a buddy allocator.
Buddy allocators have certain limitations though. For one the
allocator requires metadata to be allocated from the kernel's
system memory. This causes a given buddy allocation to potentially
sleep on a kmalloc() call.

This patch has been created so that a new backend can be created
which will avoid any dynamic system memory management routines
from being called.

Bug 1781897

Change-Id: I98d6c8402c049942f13fee69c6901a166f177f65
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1172115
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2016-07-19 11:21:46 -07:00