Commit Graph

7 Commits

Author SHA1 Message Date
Terje Bergstrom
3bda3a0678 Revert "Revert "gpu: nvgpu: add turing support""
This reverts commit 278842d6ff4e15467e0b8761c6e1b2a05f926f91.

Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Change-Id: I37f47c137c048ddc3a728e143b6f30be525de120
Reviewed-on: https://git-master.nvidia.com/r/1918622
2018-10-12 17:35:09 +05:30
David Gilhooley
b74a4dbd26 Revert "gpu: nvgpu: add turing support"
This reverts commit 27686d8b56316c7ad772dd91548e91516d59f3b1.

Change-Id: Iebda705858edbd58c10ca3024a4ad060401485b6
Signed-off-by: David Gilhooley <dgilhooley@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1918612
2018-10-12 17:35:09 +05:30
Deepak Nibade
51244d6112 gpu: nvgpu: add turing support
Add Turing specific common, unit, hardware header files

Make all the Makefile and Makefile.sources changes to compile
all Turing specific code

Bug 200454999

Change-Id: I62ebff5c078b4b8817fc83ea0e4ee3cfffe668dc
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1917983
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2018-10-12 17:35:09 +05:30
Terje Bergstrom
2c17e71aa1 gpu: nvgpu: Add MC APIs for reset masks
Add API for querying reset mask corresponding to a unit. The reset
masks need to be read from MC HW header, and we do not want all
units to access Mc HW headers themselves.

JIRA NVGPU-954

Change-Id: I49ebbd891569de634bfc71afcecc8cd2358805c0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1823384
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-12 17:35:07 +05:30
Debarshi Dutta
421e64aad7 gpu: nvgpu: move header location of gk20a.h
Update header path of gk20a.h in files present in common/
to <nvgpu/gk20a.h>

Jira NVGPU-597

Change-Id: I3431dae93ada9bd561454c89a0b99c5292ab4a8d
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1832024
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-25 00:20:25 -07:00
Terje Bergstrom
3b09c9d16a gpu: nvgpu: Move FBPA interrupt HAL to MC
FBPA interrupt is reported via a register in MC. Move the HAL
dealing with that interrupt to MC.

JIRA NVGPU-954

Change-Id: Ic2b8439e82788f851536bcbb5cba6580f4d5ee7e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1813520
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-13 19:18:28 -07:00
Terje Bergstrom
7ac0b046a5 gpu: nvgpu: Move MC HAL to common
Move implementation of MC HAL to common/mc. Also bump gk20a
implementation to gm20b.

gk20a_mc_boot_0 was used via a HAL, but we have only one possible
implementation. It also has to be anyway called directly to detect
which HALs to assign, so make it a true common function.

mc_gk20a_handle_intr_nonstall was also used only in os/linux/intr.c
so move it there.

JIRA NVGPU-954

Change-Id: I79aedc9158f90d578db0edc17b714617b52690ac
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1813519
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-13 19:18:24 -07:00