Commit Graph

8 Commits

Author SHA1 Message Date
Abdul Salam
f357136ff9 gpu: nvgpu: Restructure common.pmu.perf unit
This patch does the following.
1. Remove unused functions from pmu_perf.c.
2. Append public functions with nvgpu.
3. Move get_status declaration from vfe_var to include/perf.
4. Rename perf_tu104.c to perf_ps35.c and Makefile changes.
5. Remove the unused perf_tu104.h file.
6. Make local functions as static.

Jira NVGPU-1960

Change-Id: I829d113d994dbfc02a45f29795b5926c58106049
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2023886
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-02-26 22:54:22 -08:00
Abdul Salam
c7702ab5ff gpu: nvgpu: Restructure common.pmu.therm unit
This patch does the following.
1. Remove include of HW header files in common.
2. Append public functions with nvgpu.

Jira NVGPU-1959

Change-Id: Ibd60620e9db14b52d49577b899b2d2077b5a544a
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2019236
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-02-21 21:56:23 -08:00
rmylavarapu
8daafcbae8 gpu: nvgpu: Restructuring clk.h into different units
Changes:
1) Separated clk.h which is in /nvgpu/include/pmu
 into different units
2) Renamed global functions

Intention: At present /nvgpu/include/pmu/clk.h
consists of structures and functions of different
clock units. It is difficult to work on individual
clk units if this file is not separated into
individual units. All stucts and functions in clk.h
are seperated into different clk units.
Individual private clk units were not touched.
Post this patch, the sebsequent patches would make
changes in the individual clk units.

NVGPU-2707

Change-Id: I7bf9fab38a73bceb451291530a67c70ed343b0cb
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2021704
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-02-19 01:55:54 -08:00
Philip Elcan
a789034209 gpu: nvgpu: pstate: update type for size param
Update interfaces to use size_t to align with boardobj_construct_super()
and avoid unnecessary casts.

JIRA NVGPU-1008

Change-Id: I4e1aca8c061ec8ee6da7428f6bc200437894dc57
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011438
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-02-11 14:04:39 -08:00
Mahantesh Kumbar
f7acf93345 gpu: nvgpu: Change in pstate s/w setup sequence
pstate s/w setup needs to know offsets of boardobjs present
in PMU super surface to construct boardobj set/get_status
construct.

With SSMD support, boardobj offset will be part of SSMD
lookup table which is part of PMU super surface buffer &
updated by PMU RTOS during init stage.

As SSMD is updated at init stage & SSMD will be ready for nvgpu
to read offsets only when PMU init message is received,
so pstate s/w must wait till PMU is ready to construct
boardobj set/get_status

JIRA NVGPU-1874

Change-Id: I87d840965b92c538f26dbedf458f0c18d1808abc
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2000863
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-02-07 04:15:42 -08:00
Abdul Salam
0f2bbca0df gpu: nvgpu: Remove extra perf load RPC
1.Remove perf_pmu_load which calls the perf load RPC.
  This is already done in pmu_vfe_load and needs only once.
2.Replace LOAD with VF_INVALIDATE.
  MSG_ID_VFE_CALLBACK should call VF_INVALIDATE and not LOAD.
3.Move the clk arb WQ after VF_INVALIDATE for synchronization.
4.Move the perf load RPC after PMU setup.

Bug 200454682

Change-Id: I799588c102dd7328f0a43ed953f91a3a8b6b91e9
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2012338
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-02-06 15:23:49 -08:00
Philip Elcan
725daf3400 gpu: nvgpu: pmu: fix MISRA 10.3 issues in pstate
MISRA Rule 10.3 prohibits implicit assignment of an object of different
essential type or narrower type. This change addresses a number of
miscellaneous violations in pstate.c

JIRA NVGPU-1008

Change-Id: Iccde60d0110681f72f37dc64b2e67983757ad563
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1995882
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-18 13:54:45 -08:00
Terje Bergstrom
dce78f7332 gpu: nvgpu: Move PMU code to common/pmu
Move code interfacing with PMU tasks to common/pmu.

JIRA NVGPU-961

Change-Id: Ie62611b0ffe1196d4bfdc740e03017e1894a834f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1950991
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-10 20:09:55 -08:00