The patch is adding a OS specific call to get the supported
syncpoints from the DT entry. The syncpoints is used to
initialize the number of supported channels while GPU
initialization.
The error path is taken care with the default value 256.
As device tree entries not available in upstream, the path
handled with the default value 256.
Change-Id: I9ac949d68a9f93f0e56fdbf8c8cd33b7dc903298
Signed-off-by: Dinesh T <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2826280
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This patch is required for
- enabling NVGPU driver on OOT by enabling various
configs required.
- replacing new APIs for some deprecated APIs by
guarding with linux version for soc.c.
- CONFIG_TEGRA_HV_MANAGER is enabled by default in OOT kernel,
removing CONFIG_TEGRA_HV_MANAGER check from various places.
Bug 3812973
Change-Id: I07f0b738ca95d4a3996e7f3ee5e895463db0626b
Signed-off-by: Dinesh T <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2822434
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
nvpmodel updates the devfreq frequency limits as per power requirements
for specific chip. Clock arbiter ignored these limits and set clock
to maximum supported frequency which may lead to leaking power and
over heating.
Add support to get the devfreq limits by registering PM_QOS notifiers.
Note that with this patch we enable CONFIG_GK20A_PM_QOS when PM_DEVFREQ
is enabled. So it will be enabled for all supported kernels (4.9, 4.14
kernels continue to support this. For 5.10+ kernels notifiers added in
this patch will be used. Thermal framework related notifiers for kernels
after 4.14 will not be registered as those use downstream interfaces
that are not available.)
We maintain devfreq min/max limits in the scale profile and update those
in the notifier calls. We use these limits to clamp the frequency in the
clock arbiter.
Bug 3852824
Change-Id: I734a9fb080fee1a91e9b5da071b662dbd9a18682
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2822686
(cherry picked from commit eacaf8cec2)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2822682
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Changes
1. Remove dGPU flag dependency on calling gsp sw init on tot.
2. Created Enable flag for gsp scheduler to enable them on ga10b
platforms.
3. Engine config flag is only enabled for dGPU enabled platforms, as gsp
is using engine functions it need to be enabled for all gsp sched
enabled builds.
4. Changes in gsp_sequence_init/de_init where on qnx we are seeing
issues.
NVGPU-9297
Change-Id: Ia4bce85ae8fd2794da1553e9ea418c76845a10ac
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2822537
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
- As part of mmap call handler mmap_sem is being acquired which is
causing an BUG: scheduling while atomic:. This is happening because
mmap callback gets called with mmap_sem held. The mmap file handler
is called via call_mmap() via mmap_region() via do_mmap(), and the
caller of do_mmap() must hold down_write(¤t->mm->mmap_sem).
To fix this issue removing the mmap_sem locking from nvs mmap handler.
- If remap_vmalloc_range() is used to map the pages to userspace then
allocated pages should be mapped into virtually contiguous space by
passing VM_USERMAP flag to vmap(). Passing VM_USERMAP to vmap() call
if API nvgpu_dma_alloc_flags_sys() is called with flag
NVGPU_DMA_VM_USERMAP_ADDRESS.
Bug 3884011
Change-Id: I64264f6f6e0dd75b1f828dc58355d740e6ef5ccb
Signed-off-by: prsethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2820781
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Now that we are planning to enable CTRL_FIFO support with NVS,
there is no need for a separate enabled flag for the same.
CTRL_FIFO support is instead determined by the presence of
NVGPU_SUPPORT_NVS enable flag alone.
For non-auto platforms, Control-Fifo can be disabled by restricting
access to /dev/nvsched_ctrl_fifo.
Jira NVGPU-8619
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: I9dbec60e5668f38e1460c43800584e88b16a2550
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2814435
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
- The pmu_pg_task thread remains alive in the background
during railgate and rail-ungate.
- During rail-ungate, the PG task thread starts again and
executes PG-related tasks.
- It comes in pmu_pg_init_powergating() and waits for GR
initialization. Here it waits for gr to be initialized.
- In parallel, the main GPU thread works on rmmod (from
gpu_module_reload test).
- By this time, the main gpu thread has started rmmod and
gr->initialized can be set to false, thus causing an uninterruptible
wait for pmu_pg_task thread.
- To solve this, wake gr wait wq in rmmod path when
NVGPU_DRIVER_IS_DYING and NVGPU_KERNEL_IS_DYING flgas are set.
Bug 3806514
Change-Id: Id78d92f30b75aba1aee22398cc86a3acebd50ef6
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2798003
(cherry picked from commit d9345065bcb6d9ff497c127fa4cd52077f4ecfa4)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2807245
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
In order to share the TSG across different devices securely, device
instance IDs are to be exchanged for endpoint identification. Add
device instance ID field to gk20a_ctrl_priv which is generated
from gk20a level device instance id value.
Share this ID to userspace via gpu characteristics.
Bug 3677982
JIRA NVGPU-8681
Change-Id: I79d92a81c02272c52e24f5b12c452c8993137037
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2792079
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Implement the ioctls NVGPU_TSG_IOCTL_CREATE_SUBCONTEXT and
NVGPU_TSG_IOCTL_DELETE_SUBCONTEXT. These will allocate and
free the VEID numbers.
Address space association with the VEIDs is verified to
ensure that channels association with VEIDs and address
space remains consistent.
Bug 3677982
JIRA NVGPU-8681
Change-Id: I2d913baf61a6bdeec412c58270c0024b80ca15c6
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2766765
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Due to changes in the host1x driver, dma_fence callbacks will be
executed in interrupt context instead of workqueue context as
previously. To allow for that, this patch effectively moves the
workqueue step into nvgpu so that the in-nvgpu fence callback gets
executed in workqueue context.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I7bfa294aa3b4bea9888921b79175a8fc218d8e3f
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2785968
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Following changes are added to fix the issue.
1) Threads having higher priority e.g. RT may preempt
threads with sched-normal priority. As a consequence, higher priority
threads might not still see initialization of data in another thread
resulting in failures such as accessing a condition value before initialization.
Any initialization in the parent thread must be accompanied by a barrier
to make it visible in other thread. Added appropriate barriers to prevent
reordering of the initialization in the thread construction path.
2) There is a race condition between nvgpu_cond_signal() and
nvgpu_cond_destroy() in the asynchronous submit code and corresponding
worker thread's process_item callback for NVS. This may lead to
data corruption and resulting in the above errors as well. Fixed
that by adding a refcount based mechanism for ownership sharing
of the struct nvgpu_nvs_worker_item between the two threads.
Bug 3778235
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: Ie9b9ba57bc1dcbb8780801be79863adc39690f72
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2771535
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Prateek Sethi <prsethi@nvidia.com>
Reviewed-by: Ketan Patil <ketanp@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
GR context associated with channel is updated in various driver paths.
Sequence to do the same is disable the TSG, preempt the TSG, update
the GR context or instance block and then enable the TSG.
These operations and runlist updates for channel have to be done under
TSG specific ctx_init_lock to avoid the race.
suspend_contexts and resume_contexts needs special handling which is
not covered in this patch.
Bug 3677982
Change-Id: I837257fe9d9ef3eb6f69f5d7e0707e0bb6d4ea72
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2720222
Reviewed-by: Scott Long <scottl@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
With subcontexts support added, nvgpu has to allocate VEID0 channel
itself to initialize the golden context image. Allocate the channel
and init the golden context image at the beginning of alloc_obj_ctx
call for first user channel.
It can't be initialized at the end of probe as tpc pg settings need
to be updated before golden context image is initialized.
Bug 3677982
Change-Id: Ia82f6ad6e088c2bc1578a6bd32b7c7a707a17224
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2756289
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
- Change enables CONFIG_NVS_PRESENT for safety build.
- Fixes misra vioations.
- Renames sched.h to nvs_sched.h to avoid the conflict with QNX system
sched.h file for the safety support.
- Disable test_channel_close, test_tsg_unbind_channel,
test_channel_enable_disable_tsg, test_gv11b_fifo_preempt_tsg,
test_tsg_unbind_channel_check_hw_state and test_rc_deinit unit tests.
Jira NVGPU-8619
Change-Id: I7c983de2f4910fcb23687ec23368a060ce89c918
Signed-off-by: prsethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2763579
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
- With ELPG + RG enabled, gpu_module_reload test fails.
- This happens because the test tries to unload nvgpu.ko
module and then reload it. This all happens with RG enabled.
- During rmmod of nvgpu.ko module the code path taken is:
nvgpu_remove() -> nvgpu_quiesce() -> gk20a_pm_prepare_poweroff
-> nvgpu_prepare_poweroff -> pmu_destroy
- In this code path, NVGPU_DRIVER_IS_DYING flag is not set.
- Thus, in pmu_pg_task thread (which keeps on running in parallel),
commands are sent to the PMU and the driver keeps waiting for the
ACK in nvgpu_pmu_wait_fw_ack_status().
- Add nvgpu_start_gpu_idle() in nvgpu_remove() path, before calling
nvgpu_quiesce().
- This will set NVGPU_DRIVER_IS_DYING flag to true.
- nvgpu_can_busy() will return 0 when the driver is shutting down or
getting removed.
Bug 3676200
Change-Id: Ic24f58c210e4b477e5d560b053b70c16308e16f1
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2762310
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
(cherry picked from commit 8f1792565e71b822a6e9cc50af4b43c1b48518e0)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2765300
Tested-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Following changes are added here to simplify the overall
sequence.
1) Remove deferred update for runlists. NVS worker thread
shall submit the updated runlist.
2) Moved Runlist mem swap inside update itself. Protect
the swap() and hw_submit() path with a spinlock. This
is temporary till GSP.
3) Enable Control-Fifo mode from nvgpu driver.
Jira NVGPU-8609
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: Icc52e5d8ccec9d3653c9bc1cf40400fc01a08fde
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2757406
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
In linux threaded interrupts run with a Realtime priority
of 50. This bumps up the priority of bottom-half handlers
over regular kernel/User threads even during process
context.
In the current implementation scheduler thread still
runs in normal kernel thread priority. In order to
allow a seamless scheduling experience, the worker
thread is now created with a Realtime priority of 1.
This allows for the Worker thread to work at a priority
lower than interrupt handlers but higher than the regular
kernel threads.
Linux kernel allows setting priority with the help of
sched_set_fifo() API. Only two modes are supported
i.e. sched_set_fifo() and sched_set_fifo_low().
For more reference, refer to this article
https://lwn.net/Articles/818388/.
Added an implementation of nvgpu_thread_create_priority()
for linux thread using the above two APIs.
Jira NVGPU-860
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: I0a5a611bf0e0a5b9bb51354c6ff0a99e42e76e2f
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2751736
Reviewed-by: Prateek Sethi <prsethi@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
In the current setting, clock arbiter skips setting
the clock if its already set previously. The value
set by the arbiter is stored in
"struct nvgpu_clk_arb->actual" whenever the clock is
updated via the arbiter. However, DVFS might also
update the clock and the updates are not synchronized
with the arbiter. Hence, ensure that any clock
requests are always updated i.e. the requested rate is
set even if the previous rate remains the same.
In the devfreq scale() part, scale emc when clk_arb
is active and skip setting of clocks.
Bug 3666615
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: I32bf4dbf81b19fdd6fa0bdec3a6c9a9312b78eca
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2727787
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This is adding a mutex lock to synchronise between
stall isr threads.
Orin(t234) has three interrupt lines and three ISR
threads to handle bottom half of the ISR. The threads
sharing same data between them without proper synchronization.
When multiple interrupts trigger simeltaneously, causing the
threads running in parallell like below traces
#0 nvgpu_cic_mon_intr_stall_isr (g=g@entry=0x5ed62a9318)
at /home/dt/automotive-dev-main-20220802T015100095/kernel/nvgpu/drivers/gpu/nvgpu/common/cic/mon/mon_intr.c:158
#1 0x00000013758cae30 in nvgpu_intr_stall (arg=0x5ed62a9120)
at /home/dt/automotive-dev-main-20220802T015100095/qnx/src/resmgrs/nvrm/nvgpu_rmos/os/intr.c:140
#2 0x00000013758ec090 in nvgpu_posix_thread_wrapper (data=<optimized out>)
at /home/dt/automotive-dev-main-20220802T015100095/kernel/nvgpu/drivers/gpu/nvgpu/os/posix/thread.c:77
#3 0x0000001375b01000 in pthread_attr_setdetachstate ()
from /home/dt/automotive-dev-main-20220802T015100095/out/embedded-qnx-t186ref-debug-none/target_rootfs/lib/libc.so.5
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
This is causing some race in shared data access and causing
multiple issues.
Bug 3647988
Change-Id: If40e581635b52cce288d8f4b00af6a040f7f9a6e
Signed-off-by: Dinesh T <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2755874
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
The function tegra_bpmp_get() returns an error pointer on failure and
so if the call to tegra_bpmp_get() fails, because the device-tree
property is missing, then this is not detected and leads to a crash when
trying to dereference the pointer to the bpmp handle. Fix this by
correctly checking the return value from tegra_bpmp_get().
Bug 3752030
Change-Id: I944063ab7e116fc81769c9dbbfefe6b6dc4bf0f4
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2759251
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Add support for accessing Event Queue for non-exclusive
users. Allows, non-exclusive users to open Event Queues
before exclusive users. Non-Exclusive users can only
use the Event Queue in a read-only mode.
Add VM_SHARED for Event Queues across all users instead of just
Read-Only users. Event queues are shared with multiple processes
and as such require VM_SHARED across all users(exclusive and
observers).
Jira NVGPU-8608
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: Id9733c2511ded6f06dd9feea880005bdc92e51a0
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2745083
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
This patch fixes a bug where GPU mappings with the L3 hint
would fail. The failure happens because the L3 map flag does
not get consumed if L3 allocations are disabled. The fix
is to consume the flag.
Bug 3717951
Bug 3486025
Change-Id: Ib10ee58cc060318c810f86013de7311f73c25729
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2750419
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
GVS: Gerrit_Virtual_Submit
- Add AP_INIT RPC to initialize the AELPG feature.
- Add AP_CTRL_INIT_AND_ENABLE RPC to program some
APCTRL values for Adaptive ELPG.
- Add AP_CTRL_ENABLE and AP_CTRL_DISABLE RPCs to
send AELPG enable/disable request to PMU via sysfs
node.
- Re-structure the rpc handler based on PG_LOADING
and PG unit id. This is needed to handle different
types of new RPCs from PMU.
JIRA NVGPU-7182
Change-Id: If00b00730507f17ff1883a67094f7e16da5b81ea
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2728286
(cherry picked from commit fffb58703bd718600e8c983dcd1c81d9abe83802)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2603161
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
