3 Commits

Author	SHA1	Message	Date
Thomas Fleury	4ef4939797	gpu: nvgpu: add base_shift and alloc_size ramin HALs ... Added the following HALs - ramin.base_shift - ramin.alloc_base Use above HALs in mm, instead of using hw definitions. Defined nvgpu_inst_block_ptr to - get inst_block address, - shift if by base_shift - assert upper 32 bits are 0 - return lower 32 bits Added missing #include for <nvgpu/mm.h> Jira NVGPU-3015 Change-Id: I558a6f4c9fbc6873a5b71f1557ea9ad8eae2778f Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2077840 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-04-07 15:54:10 -07:00
Nitin Kumbhar	82b5f356d0	gpu: nvgpu: make nvgpu_gr_subctx a priv struct ... Make struct nvgpu_gr_subctx a private struct and add an api to access subctx header. JIRA NVGPU-3060 Change-Id: Ia1f0471084f90eddd31ddc6869bd767866f9b4e2 Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2088531 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-04-06 04:34:25 -07:00
Seshendra Gadagottu	a9c97031b5	gpu: nvgpu: Move common fecs_trace to parent unit ... Since fecs_trace has only one source file, move that file to parent unit. JIRA NVGPU-2831 Change-Id: I9b436cb28150f6f04403967b43f023adebc0dd93 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2083069 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>	2019-03-27 17:26:08 -07:00