Commit Graph

163 Commits

Author SHA1 Message Date
Konsta Holtta
2f51d7c5ed gpu: nvgpu: reorder runlist enable/disable
Move gk20a_fifo_set_runlist_state() to common and move
gk20a_tsg_{enable,disable}_sched() to be part of tsg.

Jira NVGPU-1309

Change-Id: I16ffe7f9f97249b5ac0885bba56510847bb6858b
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1978059
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-01-04 11:15:43 -08:00
Ranjanikar Nikhil Prabhakarrao
f0762ed483 gpu: nvgpu: add speculative barrier
Data can be speculativerly stored and
code flow can be hijacked.

To mitigate this problem insert a
speculation barrier.

Bug 200447167

Change-Id: Ia865ff2add8b30de49aa970715625b13e8f71c08
Signed-off-by: Ranjanikar Nikhil Prabhakarrao <rprabhakarra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1972221
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2018-12-30 22:26:01 -08:00
Philip Elcan
90024cb73a gpu: nvgpu: misc MISRA 14.4 fixes
This fixes a few lingering MISRA Rule 14.4 violations.  Rule 14.4
requires that the condition of an if statement be a boolean.

JIRA NVGPU-1022

Change-Id: Ib6293e00e0436fceee9f7bf0ada1b6ac01a82faa
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1975424
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2018-12-19 11:24:42 -08:00
Debarshi Dutta
0188b93e30 gpu: nvgpu: move gk20a_fifo_recover_tsg into tsg unit
gk20a_fifo_recover_tsg does high-level software calls and
invokes gk20a_fifo_recover. This function belongs to the tsg unit and
is moved to tsg.c file. Also, the function is renamed to
nvgpu_tsg_recover.

Jira NVGPU-1237

Change-Id: Id1911fb182817b0cfc47b3219065cba6c4ca507a
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1970034
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2018-12-14 21:55:07 -08:00
Debarshi Dutta
7f58347ed9 gpu: nvgpu: move tsg functions to common
Any tsg specific functions that does high-level software-centric
operations below to the TSG unit and not the FIFO unit.
Move the below public functions as well as their dependent
static functions to common/fifo/tsg.c and also rename them to use the
prefix nvgpu_tsg_*

gk20a_fifo_set_ctx_mmu_error_tsg
gk20a_fifo_abort_tsg
gk20a_fifo_error_tsg
gk20a_fifo_check_tsg_ctxsw_timeout

Jira NVGPU-1237

Change-Id: I4e3da821a878d4b4a0a0b53fbb7f4c10f135f58d
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1934299
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2018-12-14 21:54:26 -08:00
Richard Zhao
2992990431 gpu: nvgpu: separate common tsg open/release functions
The common functions are shared with RM server. When add new variables
to struct tsg_gk20a, it won't have to add init code in RM server.

Bug 200473570

Change-Id: Ic12337ac8834599e23056d4c8bdb7ece9664f68e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1971838
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2018-12-14 16:05:57 -08:00
Debarshi Dutta
e5bebd880f gpu: nvgpu: replace tsgid input variable with pointer to a struct tsg_gk20a
replace tsgid with a pointer to a struct tsg_gk20a in the function
gk20a_fifo_tsg_abort(). gk20a_fifo_tsg_abort needs to enumerate through
all the channels within the tsg as well as pass the tsg pointer to
other functions, qualifying the need to use a pointer instead as an
input parameter.

Jira NVGPU-1461

Change-Id: I59cec05d5d778f733d0c3e9ffadf46e74e249080
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1956567
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2018-11-30 08:14:48 -08:00
Konsta Holtta
b08c613402 gpu: nvgpu: make gr_ctx a pointer in tsg
Remove a dependency to a graphics type in tsg header by adding a pointer
indirection.

Jira NVGPU-967
Jira NVGPU-1149

Change-Id: I9177e6eedf08bfe4a3b981b67fa8d4d734f9e50f
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1822023
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-30 05:54:10 -07:00
Amurthyreddy
f8ce19f879 gpu: nvgpu: MISRA 14.4 Function pointer as boolean
MISRA rule-14.4 doesn't allow the usage of function pointers & integer
types as booleans in the controlling expression of an if statement or
an iteration statement.

Fix violations where a function pointer or a function whose return
value is an integer, is used as a boolean in the controlling expression
of if and loop statements.

JIRA NVGPU-1021

Change-Id: Ic5336268394ba4396ce80744c25930d2fb44dc42
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1932147
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2018-10-24 17:01:39 -07:00
Amurthyreddy
88d21daedb gpu: nvgpu: MISRA 14.4 err/ret/status as boolean
MISRA rule 14.4 doesn't allow the usage of integer types as booleans
in the controlling expression of an if statement or an iteration
statement.

Fix violations where the integer variables err, ret, status are used
as booleans in the controlling expression of if and loop statements.

JIRA NVGPU-1019

Change-Id: Ia2ec5f1db3c7a1884efe5ba7b8b4d9ebbd021734
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1921373
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2018-10-24 17:00:11 -07:00
Amurthyreddy
d522a2ddfc nvgpu: gk20a: MISRA 10.1 boolean fixes
Fix violations where a variable of type non-boolean is used as
boolean in gpu/nvgpu/gk20a.

JIRA NVGPU-646

Change-Id: Id02068c77f9385adb82c27ef1994a3f88499de48
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1829584
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2018-10-24 16:59:39 -07:00
aalex
e1a4bc8401 Revert "Revert "gpu: nvgpu: refactor SET_SM_EXCEPTION_MASK ioctl""
This patch was reverted as the "set_sm_exception_type_mask" HAL
assignment for gp10b was missing causing regression on Pascal platform.

Added missing gp10b HAL assignment for setting SM exception mask.

Bug 200447406
This reverts commit ce5228e094.

Change-Id: Ic48f4661fd4b6100310f8b4d23d902847e31f5df
Signed-off-by: aalex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1837653
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Tested-by: Sandarbh Jain <sanjain@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
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2018-10-12 17:35:10 +05:30
Konsta Holtta
c47eab005a gpu: nvgpu: move tsg code to common
tsg_gk20a.c doesn't depend on any specific hardware, so move it to the
common directory.

Rename the posix tsg file to posix-tsg.c.

Jira NVGPU-967

Change-Id: I6e8908a8f6cf43132db8dffe3a99e424e4f764b1
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1821509
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2018-09-24 15:53:48 -07:00