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16 Commits

Author SHA1 Message Date
Richard Zhao
da1da8f563 gpu: nvgpu: move .preempt_trigger/.is_preempt_pending to IDs 
.preempt_tsg uses .preempt_trigger/.is_preempt_pending, so they both
have to use runlist_id and tsgid too.

Jira GVSCI-15770

Change-Id: Ida24d160c362ea1348d7c19e6d0352bb390d0a64
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2863442
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-03-21 02:30:57 -07:00
Richard Zhao
8f5adab299 gpu: nvgpu: .preempt_tsg move to use runlist_id/tsgid 
It's for making .preempt_tsg reusable on server side.

Jira GVSCI-15770

Change-Id: Id9f477baa29cb63fb0e1d1650f4b1e6a2fa248c0
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2863441
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-03-21 02:30:49 -07:00
Richard Zhao
e81a36e56a gpu: nvgpu: hal: fix compile error of new compile flags 
It's preparing to add bellow CFLAGS:
    -Werror -Wall -Wextra \
    -Wmissing-braces -Wpointer-arith -Wundef \
    -Wconversion -Wsign-conversion \
    -Wformat-security \
    -Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough

Jira GVSCI-11640

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: Ia16ef186da1e97badff9dd0bf8cbd6700dd77b15
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555057
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2022-01-13 12:36:19 -08:00
Konsta Hölttä
f4ec400d5f gpu: nvgpu: simplify nvgpu_timeout_init 
nvgpu_timeout_init() returns an error code only when the flags parameter
is invalid. There are very few possible values for flags, so extract the
two most common cases - cpu clock based and a retry based timeout - to
functions that cannot fail and thus return nothing. Adjust all callers
to use those, simplfying error handling quite a bit.

Change-Id: I985fe7fa988ebbae25601d15cf57fd48eda0c677
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2613833
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 2021-10-26 13:47:32 -07:00
Sagar Kamble
07d8a39647 gpu: nvgpu: wait for stalling interrupts to complete during TSG unbind preempt 
Some of the engine stalling interrupts can block the context save off
the engine if not handled during fifo.preempt_tsg. They need to be
handled while polling for engine ctxsw status.

Bug 200711183

Change-Id: I7418a9e0354013b81fbefd8c0cab5068404fc44e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2521971
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GVS: Gerrit_Virtual_Submit
 2021-05-03 20:40:05 -07:00
Sagar Kamble
3f08cf8a48 gpu: nvgpu: rename feature Make and C flags 
Name the Make and C flag variables consistently wih syntax:
CONFIG_NVGPU_<feature name>

s/NVGPU_DEBUGGER/CONFIG_NVGPU_DEBUGGER
s/NVGPU_CYCLESTATS/CONFIG_NVGPU_CYCLESTATS
s/NVGPU_USERD/CONFIG_NVGPU_USERD
s/NVGPU_CHANNEL_WDT/CONFIG_NVGPU_CHANNEL_WDT
s/NVGPU_FEATURE_CE/CONFIG_NVGPU_CE
s/NVGPU_GRAPHICS/CONFIG_NVGPU_GRAPHICS
s/NVGPU_ENGINE/CONFIG_NVGPU_FIFO_ENGINE_ACTIVITY
s/NVGPU_FEATURE_CHANNEL_TSG_SCHED/CONFIG_NVGPU_CHANNEL_TSG_SCHED
s/NVGPU_FEATURE_CHANNEL_TSG_CONTROL/CONFIG_NVGPU_CHANNEL_TSG_CONTROL
s/NVGPU_FEATURE_ENGINE_QUEUE/CONFIG_NVGPU_ENGINE_QUEUE
s/GK20A_CTXSW_TRACE/CONFIG_NVGPU_FECS_TRACE
s/IGPU_VIRT_SUPPORT/CONFIG_NVGPU_IGPU_VIRT
s/CONFIG_TEGRA_NVLINK/CONFIG_NVGPU_NVLINK
s/NVGPU_DGPU_SUPPORT/CONFIG_NVGPU_DGPU
s/NVGPU_VPR/CONFIG_NVGPU_VPR
s/NVGPU_REPLAYABLE_FAULT/CONFIG_NVGPU_REPLAYABLE_FAULT
s/NVGPU_FEATURE_LS_PMU/CONFIG_NVGPU_LS_PMU
s/NVGPU_FEATURE_POWER_PG/CONFIG_NVGPU_POWER_PG

JIRA NVGPU-3624

Change-Id: I8b2492b085095fc6ee95926d8f8c3929702a1773
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130290
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 2019-06-11 09:46:24 -07:00
Mahantesh Kumbar
b691df5a02 gpu: nvgpu: compile out PMU members & headers for safety 
-compile out nvgpu_pmu members which are not required for
safety buid & modified source as required to support same.
-compile out PMU headers include which are not required for
safety code
-Removed unnecessary PMU header includes from some files

JIRA NVGPU-3418

Change-Id: I5364b1b16c46637d229e82745dd2846cb6335a72
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128228
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 2019-06-06 06:55:58 -07:00
Mahantesh Kumbar
90aee0086f gpu: nvgpu: rename NVGPU_LS_PMU to NVGPU_FEATURE_LS_PMU 
renamed NVGPU_LS_PMU to NVGPU_FEATURE_LS_PMU to follow
nvgpu naming standard
Compile out LS PMU files when PMU RTOS support is
disabled for safety build by setting NVGPU_LS_PMU
build flag to 0

JIRA NVGPU-3418

Change-Id: Ib09924ac25657e932723c10be573f2f701cb7bea
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127794
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 2019-05-30 19:27:14 -07:00
Mahantesh Kumbar
120defb7cb gpu: nvgpu: compile out PMU mutex code for safety 
Compile out PMU mutex calls called from other unit when
PMU RTOS support is disabled for safety build by setting
NVGPU_LS_PMU build flag to 0

NVGPU JIRA-3418

Change-Id: I040a744d5102f7fd889d4e8ad6e94129eadb73dd
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124698
Reviewed-by: Automatic_Commit_Validation_User
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Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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 2019-05-30 19:25:42 -07:00
Mahantesh Kumbar
3d1169544f gpu: nvgpu: alloc space for PMU's struct nvgpu_pmu at runtime 
Allocating space for struct nvgpu_pmu at run time as part of
nvgpu_pmu_early_init() stage and made required changes to
dependent fiels as needed.

JIRA NVGPU-1972

Change-Id: I2d1c86d713e533c256ba95b730aa2e9543a66438
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110109
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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 2019-05-23 00:56:55 -07:00
Mahantesh Kumbar
0a64f6cb2d gpu: nvgpu: PMU pmu.c/h header include cleanup 
Some headers are not required to include in pmu.c/h as
lot of PMU code restructure happened, so removed headers
which not required anymore.

JIRA NVGPU-1972

Change-Id: Iead7f049d167cdaaaf7c75c2a5e19ae7b068fe6b
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110108
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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 2019-05-23 00:56:45 -07:00
Debarshi Dutta
4c30bd599f gpu: nvgpu: rename tsg_gk20a*/gk20a_tsg* functions. 
rename the functions with the prefixes tsg_gk20a*/gk20a_tsg*
to nvgpu_tsg_*

Jira NVGPU-3248

Change-Id: I9f5f601040d994cd7798fe76813cc86c8df126dc
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2120165
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 2019-05-17 01:49:27 -07:00
Seema Khowala
c9686156c1 gpu: nvgpu: preempt MISRA fix for Rule 17.7 
Check return value of nvgpu_pmu_lock_rlease and
spit error message.
Check return value of nvgpu_timeout_init and spit
error message. Also return to the calling function
upon timeout init error.

JIRA NVGPU-3383

Change-Id: I91636255d1f16fab4b2ab934df67149f5efca7fe
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113107
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2019-05-07 20:27:52 -07:00
Debarshi Dutta
17486ec1f6 gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs 
rename struct tsg_gk20a to struct nvgpu_tsg and rename struct
channel_gk20a to struct nvgpu_channel

Jira NVGPU-3248

Change-Id: I2a227347d249f9eea59223d82f09eae23dfc1306
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112424
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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 2019-05-06 02:56:53 -07:00
Thomas Fleury
258a6141fd gpu: nvgpu: rename runlist functions 
Renamed:
- gk20a_runlist_reload -> nvgpu_runlist_reload
- gk20a_fifo_interleave_level_name -> nvgpu_runlist_interleave_level_name
- gk20a_runlist_update_for_channel -> nvgpu_runlist_update_for_channel
- nvgpu_fifo_lock_active_runlists -> nvgpu_runlist_lock_active_runlists
- nvgpu_fifo_unlock_active_runlists -> nvgpu_runlist_unlock_active_runlists
- nvgpu_fifo_get_runlists_mask -> nvgpu_runlist_get_runlists_mask
- nvgpu_fifo_unlock_runlists -> nvgpu_runlist_unlock_runlists
- gk20a_runlist_update -> nvgpu_runlist_update

Jira NVGPU-3198

Change-Id: Ifc5ad2aae546614667c174643ee07283d2716adc
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108029
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 2019-04-30 12:46:02 -07:00
Seema Khowala
bdfc26af8b gpu: nvgpu: move preempt code to common/fifo and hal/fifo 
Move chip specific preempt code to hal/fifo
Move non-chip specific preempt code to common/fifo

Remove fifo.get_preempt_timeout

Rename gk20a_fifo_get_preempt_timeout -> nvgpu_preempt_get_timeout
Rename gk20a_fifo_preempt -> nvgpu_preempt_channel

Add fifo.preempt_trigger hal for issuing preempt
Add fifo.preempt_runlists_for_rc hal for preempting runlists during rc
Add fifo.preempt_poll_pbdma hal

Add nvgpu_preempt_poll_tsg_on_pbdma to be called from rc

JIRA NVGPU-3144

Change-Id: Idb089acaa0c6ca08de17487c3496459a61f0bcd4
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2100819
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 2019-04-22 15:25:29 -07:00