Commit Graph

5 Commits

Author SHA1 Message Date
Amurthyreddy
b68e465fab gpu: nvgpu: MISRA 10.1 boolean fixes
MISRA rule 10.1 doesn't allow the usage of non-boolean variables as
booleans. Fix violations where a variable of type non-boolean is used
as a boolean.

JIRA NVGPU-646

Change-Id: If451037ada9a5f41b0cddb50778de57f60864f5c
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1815742
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-11-13 09:45:07 -08:00
Terje Bergstrom
7525c1337b gpu: nvgpu: Remove the GPU-NEXT conditional
Remove build conditional for GPU-NEXT. It was used for including
code for tu104, but now it's part of main nvgpu. Leave a TURING
conditional to not need Turing code in other builds.

JIRA NVGPU-961

Change-Id: I74177863c451d78b6db6165249561f15eadc3cc3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1936803
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-11-08 19:35:09 -08:00
Scott Long
0bceaf295a gpu: nvgpu: MISRA 21.15 fixes to netlist code
MISRA Rule 21.15 prohibits use of memcpy() with incompatible ptrs
to qualified/unqualified types.

To circumvent this issue we've introduced a new MISRA-compliant
nvgpu_memcpy() function.

This change switches all offending uses of memcpy() in netlist/*
code over to use nvgpu_memcpy() with appropriate casts applied.

Also changed the type of the memcpy src variable from u32 * to
u8 * to avoid unnecessary casts.

JIRA NVGPU-849

Change-Id: I442596d6405ac543edc3d26c1367ed37fd02941c
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1941259
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-11-05 15:24:49 -08:00
Nicolas Benech
bbde800b35 gpu: nvgpu: Fix LibC MISRA 17.7 in GPU specific
MISRA Rule-17.7 requires the return value of all functions to be used.
Fix is either to use the return value or change the function to return
void. This patch contains fix for all 17.7 violations instandard C functions
in GPU specific files.

JIRA NVGPU-1036

Change-Id: Iefadc38bdbea4f02de3c24b6ad1c71d6eb0af4bd
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1929903
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-11-03 09:18:06 -07:00
Deepak Nibade
e059f3cb12 gpu: nvgpu: add separate unit for netlist
All the netlist parsing code is currently under GR unit, but netlist
ucode parsing does not really have any logical dependency to GR

Hence separate out a new unit common/netlist/ that parses the netlist
image and stores/exposes its content through netlist_vars structure

Structure nvgpu_netlist_vars is added to structure gk20a

Move netlist parsing code to common/netlist/netlist.c and chip
specific files to common/netlist/netlist_<chip>.c
Move simulation netlist parsing to common/netlist/netlist_sim.c

Rename g.ops.gr_ctx HAL to g.ops.netlist

Rename all the exported structures to be in the form of nvgpu_*
Rename all exported functions to be in the form of nvgpu_netlist_*()

Add netlist initialization to GPU boot path, and add deinitialization
to GPU remove path

Jira NVGPU-1317

Change-Id: I9af86e3b3230a89db5260cc8ed96ff5f72938c9a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1936454
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-31 09:00:49 -07:00