Commit Graph

1033 Commits

Author SHA1 Message Date
Richard Zhao
e7664f9345 gpu: nvgpu: make tpc_fs_mask work on production board
On production fused boards, it uses gr_fe_tpc_fs_r() to mask TPCs,
rather than fues.

Bug 1734150

Change-Id: I7b4eb428f1ad0cf841a57214e0c8c1e8f17b2c5a
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1111630
(cherry picked from commit 869ea54967812e03d9f1e69775ca56fd6459216c)
Reviewed-on: http://git-master/r/1122121
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-14 10:10:24 -07:00
Aingara Paramakuru
8bd22faafd gpu: nvgpu: vgpu: support reduced BAR1 range
Going forward, only the guest-accessible BAR1 range will be
contained in the DT. Full-range BAR1 support is maintained for
backwards-compatibility.

JIRA VFND-1373

Change-Id: I13cb7e3b76397f76788838c6debcdafa43a8ea25
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1126380
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-04-14 09:01:34 -07:00
Konsta Holtta
6433963801 gpu: nvgpu: clean up ctx_vars properly
Set ctx_vars.valid to false when removing support.  Otherwise a
re-poweron sequence could crash when the flag wouldn't match the real
state of the driver.

Also free all allocated regs instead of leaking some of them.

Change-Id: I3fc4fa759d839bc435e53cbd942fa5d39efe7f57
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1126138
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-14 08:43:16 -07:00
Konsta Holtta
f22df728de gpu: nvgpu: free global ctx bufs only if allocated
Try to free only allocated buffers in
gr_gk20a_free_global_ctx_buffers(), otherwise the destroy function
pointer would be NULL and crash for nonallocated buffers. This can
happen when init fails for some of the buffers. Additionally, make the
pointer NULL when a buffer is destroyed, to signify this state.

Also refactor the function upwards and call it from
gr_gk20a_alloc_global_ctx_buffers() to reduce code duplication.

Change-Id: I6e74795014f5e315b5f8342f544ddfccc0d02b71
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1126026
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-14 08:42:35 -07:00
Konsta Holtta
289cb4d9bd gpu: nvgpu: move cs_lock init to happen always
The cs_lock cyclestats mutex is unconditionally taken when removing cs
support, but it wouldn't be initialized if some part of gr init would
fail before it. Move it up to happen first, before other inits.

Change-Id: Ia5d7a888c29dc99728630a07698b1ed25af960c2
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1126004
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-14 08:42:05 -07:00
Deepak Nibade
ad49722b9d gpu: nvgpu: fix compilation error with CONFIG_PM disabled
gk20a_gpu_is_virtual() needs to pass struct device *dev
and not pdev which is undefined

Change-Id: I8835bb1175efa693b468588e91aaef9e5531d0bc
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1125439
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-04-14 06:51:59 -07:00
Alex Van Brunt
a596f0bd6d debugfs: Pass bool pointer to debugfs_create_bool()
Port the change 621a5f7ad9cd1ce7933f1d302067cbd58354173c from kernel.org
to the nvgpu driver.

bug 200187033

Change-Id: I7d742f614161d9d4ed59c4216d7c730d57ef4116
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1118397
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-04-14 06:51:52 -07:00
Seshendra Gadagottu
ccba957570 gpu: nvgpu: add support for t19x
Add build and gpu framework support for t19x.

Bug 1735757

Change-Id: I4b7c6468871ca27412a6f9be20f744bc730b4142
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1122093
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
2016-04-13 14:11:43 -07:00
Terje Bergstrom
2a57c10e4b Revert "gpu: nvgpu: vgpu: support reduced BAR1 range"
This reverts commit 2adf9164d9.

Change-Id: I3f34fe3f7353d57da576cb90ca704d375b45ef63
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1126311
Reviewed-by: Adeel Raza <araza@nvidia.com>
2016-04-13 13:16:54 -07:00
Terje Bergstrom
f72d655eac gpu: nvgpu: Remove global gk20a_device
Remove static variable gk20a_device which held a pointer
to struct device. nvgpu can serve multiple GPUs, so a
static pointer does not work.

Change-Id: I79faf5c26658490c955a9b15137e5f671650fd28
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1123940
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
2016-04-13 13:13:50 -07:00
Terje Bergstrom
00775cafab gpu: nvgpu: Support GPUs with only one interrupt line
Not all GPUs have stalling and non-stalling interrupt. Support
ones with just one interrupt line.

Change-Id: I0f1e8faa5b353b8d1b10691375bd853152379a3a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120470
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
2016-04-13 13:13:26 -07:00
Terje Bergstrom
9b5427da37 gpu: nvgpu: Support GPUs with no physical mode
Support GPUs which cannot choose between SMMU and physical
addressing.

Change-Id: If3256fa1bc795a84d039ad3aa63ebdccf5cc0afb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120469
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
2016-04-13 13:12:41 -07:00
Aingara Paramakuru
2adf9164d9 gpu: nvgpu: vgpu: support reduced BAR1 range
Going forward, only the guest-accessible BAR1 range will be
contained in the DT. Full-range BAR1 support is maintained for
backwards-compatibility.

JIRA VFND-1373

Change-Id: I5c46d670fe65a333fbef7745d1e886d53af39d73
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1122107
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-04-13 12:47:54 -07:00
Anshul Jain
f6e000a391 gpu: nvgpu: Add support for XPU rail split
Check if CPU/GPU rails are joint, disable railgating if they are.

Bug 1722942

Change-Id: I002488f6418805569b0ef0fc3032b58297adeafb
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/937026
(cherry picked from commit 61617c558a379a2a0a0f034bf0ef65cbef33d913)
Reviewed-on: http://git-master/r/1122047
(cherry picked from commit 2fb891988fdec15141ae227623d5525833c78052)
Reviewed-on: http://git-master/r/1123747
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-11 15:41:09 -07:00
Richard Zhao
c8c376b22a gpu: nvgpu: vgpu: fix error handling for mempool reserve failure
Bug 1648908
Bug 200183294

Change-Id: Iccf5eb762a544e423050d223bfcb6f8a53af6350
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1113040
Reviewed-on: http://git-master/r/1121262
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-11 15:38:42 -07:00
Richard Zhao
60b715e856 gpu: nvgpu: vgpu: add fecs trace support
Bug 1648908

Change-Id: I7901e7bce5f7aa124a188101dd0736241d87bd53
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1031861
Reviewed-on: http://git-master/r/1121261
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-11 15:38:12 -07:00
Peter Daifuku
6eeabfbdd0 gpu: nvgpu: vgpu: virtualized SMPC/HWPM ctx switch
Add support for SMPC and HWPM context switching when virtualized

Bug 1648200
JIRASW EVLR-219
JIRASW EVLR-253

Change-Id: I80a1613eaad87d8510f00d9aef001400d642ecdf
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1122034
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-08 12:34:50 -07:00
Terje Bergstrom
e8bac374c0 gpu: nvgpu: Use device instead of platform_device
Use struct device instead of struct platform_device wherever
possible. This allows adding other bus types later.

Change-Id: I1657287a68d85a542cdbdd8a00d1902c3d6e00ed
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120466
2016-04-08 09:42:41 -07:00
Peter Daifuku
2382a8433f gpu: nvgpu: fix validate_reg_op_offset error check
In validate_reg_op_offset, check for num_offsets == 0,
not for buf_offset_lo == 0, since an offset of 0 is in fact
quite possible.

Bug 1648200

Change-Id: Iea859ce0d0fabe1cc4c67610e8f3033d75e4094a
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1122017
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-08 08:24:23 -07:00
Thomas Fleury
b2dd107455 gpu: nvgpu: add trace event for channel reset
Change-Id: I319e877978b7f483108ef8f67c05702b71709f62
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1120501
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-07 13:56:38 -07:00
Thomas Fleury
327644a1a0 gpu: nvgpu: hw definitions for FECS trace on gm20b
Bug 1648908

Change-Id: I3b9a1ebaf062f15db397acd81b8312dc8daa9193
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1117262
Reviewed-on: http://git-master/r/1121233
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-07 13:54:35 -07:00
Sumit Singh
6c01d88ad9 gpu: nvgpu: Replace CONFIG_PM_RUNTIME with CONFIG_PM
As a result GPU driver unfication, one instance of CONFIG_PM_RUNTIME
got introduced. So replacing it with CONFIG_PM.

Bug 200188753

Change-Id: If3f55ac32f6800c54e5bf620684b54b39457a6f4
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/1121650
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-07 13:37:51 -07:00
Sumit Singh
e748656cd4 gpu: nvgpu: Add DT support for gpu power-domain
Make modification to add DT support for gpu
power-domain for T124 chip.

Bug 200070810
Bug 200188753

Change-Id: Iac63c8fb5fc5280e9a9f5758e63c9da009f3813d
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/739698
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
(cherry picked from commit 3d62150337d7e071f4713d8af832b268cda0d258)
Reviewed-on: http://git-master/r/1121649
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-07 13:37:05 -07:00
Sumit Singh
70b3f2b1c3 Revert "gpu: nvgpu: clean-up the code"
As CONFIG_PM_GENERIC_DOMAINS_OF is disabled for l4t, so we have to
revert this cleanup, because removed portion of code is getting used
by l4t.

Bug 200188753

This reverts commit 25f0faeb37.

Change-Id: Ib9339b03d5ae55d11597690602802b6f723b7777
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/1121648
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-07 13:36:13 -07:00
Thomas Fleury
11f11a6c0d gpu: nvgpu: fix zcb_count
gr_gk20a_init_gr_config may be invoked several times
if gr->sw_ready is reset. Need to clear zcb_count before
summing gpc_zcb_count[gpc] to avoid ever incrementing count

Change-Id: If3bfa47ed807a3e9a5dc31f7f7f96f0c6e1fed08
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1120772
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-07 13:17:30 -07:00
Peter Daifuku
cefc747ba2 gpu: nvgpu: vgpu: fix regressions causing crashes
Client OS was accessing gpu registers directly, resulting in a crash:

- Use gk20a version of init_gpu_characteristics
- Set cbc_ctrl callback to NULL

Bug 1749990
Bug 1749896

Change-Id: I7e5eea52c5d1d0c2ca7ca5e4d34dc4fc21f4e093
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1120473
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-07 11:31:42 -07:00
Peter Daifuku
37155b65f1 gpu: nvgpu: support for hwpm context switching
Add support for hwpm context switching

Bug 1648200

Change-Id: I482899bf165cd2ef24bb8617be16df01218e462f
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1120450
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-07 11:05:49 -07:00
Terje Bergstrom
6675c03603 gpu: nvgpu: Sync with register generator
Use re-generated register definitions. This synchronizes
kernel with the register generator.

Change-Id: I85a00f8f5c7bdfbc56cf4df909e5ae892d86f062
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120812
2016-04-07 09:39:28 -07:00
Deepak Nibade
16658fd39d gpu: nvgpu: post BPT_INT/PAUSE and BLOCKING_SYNC events
Post EVENT_ID_BPT_INT when bpt.int is pending
Post EVENT_ID_BPT_PAUSE when bpt.pause is pending
Post EVENT_ID_BLOCKING_SYNC whenever there is
non-stalling semaphore interrupt indicating work
completion from GR/CE2 engine

Bug 200089620

Change-Id: I91b7bf48f8585f0d318298fc0c4a66d42055f0a7
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1112274
(cherry picked from commit d2b744b1f9acac56435cd7e7ab9a7a845579ef24)
Reviewed-on: http://git-master/r/1120321
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-07 08:45:47 -07:00
Deepak Nibade
ce04ae15bb gpu: nvgpu: APIs to post event id events
Add below channel and TSG APIs to post events
on event_id interface

gk20a_channel_event_id_post_event()
gk20a_tsg_event_id_post_event()

Bug 200089620

Change-Id: I0cfadc9ffdb880b2410f97758fad47905c620db1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1112267
(cherry picked from commit 9f50d7da4500af4dbf4dabe7916eda6fc220f4fb)
Reviewed-on: http://git-master/r/1120320
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-04-07 08:44:58 -07:00
Deepak Nibade
5f10073540 gpu: nvgpu: add TSG support to channel event id
Add NVGPU_IOCTL_TSG_EVENT_ID_CTRL API for channel
event id support to TSGs

This API will accept an event_id (like BPT.INT or
BPT.PAUSE), a command to enable
the event, and return a file descriptor on which
we can raise the event (if cmd=enable)

Events generated for TSGs will reuse file
operations "gk20a_event_id_ops"

Bug 200089620

Change-Id: I2f563c6d3a0988eb670caac2d3c7c6795724792c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1030776
(cherry picked from commit 72b61fa266279038f013e582be80c21808e1038d)
Reviewed-on: http://git-master/r/1120319
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-04-07 08:44:38 -07:00
Deepak Nibade
e87ba53235 gpu: nvgpu: add channel event id support
With NVGPU_IOCTL_CHANNEL_EVENTS_CTRL, nvgpu can
raise events to User space. But user space
cannot distinguish between various types of events.
To overcome this, we need finer-grained API to
deliver various events to user space.

Remove old API NVGPU_IOCTL_CHANNEL_EVENTS_CTRL,
and all the support for this API (we can remove
this since User space has not started using this
API at all)

Add new API NVGPU_IOCTL_CHANNEL_EVENT_ID_CTRL
which will accept an event_id (like BPT.INT or
BPT.PAUSE), a command to enable the event,
and return a file descriptor on which
we can raise the event (if cmd=enable)
Event is disabled when file descriptor is closed

Add file operations "gk20a_event_id_ops"
to support polling on event fd

Also add API gk20a_channel_get_event_data_from_id()
to get event_data of event from its id

Bug 200089620

Change-Id: I5288f19f38ff49448c46338c33b2a927c9e02254
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1030775
(cherry picked from commit 5721ce2735950440bedc2b86f851db08ed593275)
Reviewed-on: http://git-master/r/1120318
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-04-07 08:43:49 -07:00
Alex Van Brunt
76ab6c1e5b host: move nvhost to its own git repo
Move nvhost out of the common Linux repo and into its own git repo. By
doing this, the same nvhost driver can work on different Linux kernel
versions.

Previously android/sync.h was referenced relative to
kernel/drivers/video/tegra/host. However, host moved to a completely
different part of the tree. Instead, reference it relative to kernel/include.

bug 1749413

Change-Id: Ic7f94093c712e5b64c9b3b660d6fce5d18e59bc0
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/1120544
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Tested-by: Arto Merilainen <amerilainen@nvidia.com>
2016-04-07 08:02:11 -07:00
Aingara Paramakuru
bcb8d983ea gpu: nvgpu: vgpu: fix warning in fifo code
Declare vgpu_channel_set_timeslice() as static.

Bug 200088648

Change-Id: I57aaa772e2fb71074f4a39af598a8e7f1819381a
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1117087
(cherry picked from commit e50774b802128967cc831a06ea9415731ce77c9e)
Reviewed-on: http://git-master/r/1120430
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-06 19:38:37 -07:00
Supriya
bf82cd220a gpu: nvgpu: Add Fuse prints on PMU Halt
-Print fuse values in case of PMU halt error
-and mailbox reads 0xDEADDEAD

Bug 1737044

Change-Id: I59f5fcf4a69bdd2a2eea81a69dd99bb9c4c21e1d
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/1113464
(cherry picked from commit d0320eed72c5070c4fcc7564c02fa38599984751)
Reviewed-on: http://git-master/r/1120429
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-06 19:38:19 -07:00
Sami Kiminki
135d6db448 gpu: nvgpu: Add HAL for GPU characteristics
Add function pointer for chip specific GPU characteristics init.

Bug 1637486

Change-Id: I6ce5eea124d8057393dec6e86e72412cc87e1cfa
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/780535
(cherry picked from commit f5c240d6ed19b5b9eedff05767c885ad5812c71e)
Reviewed-on: http://git-master/r/1120428
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-06 19:37:58 -07:00
Alex Van Brunt
d14ab70b59 gpu: nvgpu: move t18x code to kernel-nvgpu-t18x
Part of moving the nvgpu driver out of the common kernel is moving the T18x
part of the nvgpu driver out of kernel-t18x. So, update the Makefile to
replect this change.

bug 200187033

Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Change-Id: I97ab32b4c5f8971060b7bfa0aab362ba2fe2eb00
Reviewed-on: http://git-master/r/1119775
2016-04-04 17:12:33 -07:00
Alex Van Brunt
a3d7d84a3a include: linux: import gk20a.h from kernel-3.18
include/linux/gk20a.h was missed while spliting the nvgpu driver off.
This patch imports it into the nvgpu repo.

bug 200187033

Change-Id: I0622091348c1b6e19f592a1807a19739dc1f9cd0
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/1119271
2016-04-04 17:11:53 -07:00
Alex Van Brunt
ca414fd833 gpu: nvgpu: move t18x code to kernel-nvgpu-t18x
Part of moving the nvgpu driver out of the common kernel is moving the T18x
part of the nvgpu driver out of kernel-t18x. So, update the Makefile to
replect this change.

bug 200187033

Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
2016-03-30 14:06:41 -07:00
Alex Van Brunt
deb1818059 gpu: nvgpu: add kernel-nvgpu to include path
The nvgpu driver's headers moved along with the dirver. So, add the new
path to the include search path.

bug 200187033

Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
2016-03-30 14:06:41 -07:00
Sumit Singh
466dc96afe Merge branch 'PM_RUNTIME-Removal' into 'dev-kernel-3.18'
This change performs merge of 'PM_RUNTIME_Removal' dev-branch with
'dev-kernel-3.18' branch. It replaces CONFIG_PM_RUNTIME with CONFIG_PM.

JIRA TPM-704

Change-Id: I306e254716f275c283f727fc232d7244939542b6
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
2016-03-30 11:17:41 +05:30
Seshendra Gadagottu
c72ea9f83e gpu: nvgpu: wait for 500 usec before ce reset
Wait for 500 usec before ce reset to ensure that
no memory outstanding requests are pending.

Bug 1699365

Change-Id: I9f73f87cbbdca0208e95ebaee32dd1f764a3cd4f
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1116679
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-03-29 11:23:21 -07:00
Seshendra Gadagottu
f5ce107f19 gpu: nvgpu: dump gpu status on channel wdt
To get more useful debug info, dump gpu status
on channel watchdog timeout.

Bug 200163782

Change-Id: Ie160e3a65650b87f812e0c1d1d9b54814b45a1d7
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1115439
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-03-29 11:14:21 -07:00
Vishal Annapurve
cd29c45e67 gpu: nvgpu: Fix compilation with CONFIG_DEBUG_FS disabled
This change fixes issues with kernel compilation when
CONFIG_DEBUG_FS is disabled.

Bug 1737085

Change-Id: I74719674d07ae071e3df99b0dda249b54173f40b
Signed-off-by: Vishal Annapurve <vannapurve@nvidia.com>
Reviewed-on: http://git-master/r/1024167
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
2016-03-29 02:00:58 -07:00
Alex Waterman
fbc21ed2ee gpu: nvgpu: split address space for fixed allocs
Allow a special address space node to be split out from the
user adress space or fixed allocations. A debugfs node,

  /d/<gpu>/separate_fixed_allocs

Controls this feature. To enable it:

  # echo <SPLIT_ADDR> > /d/<gpu>/separate_fixed_allocs

Where <SPLIT_ADDR> is the address to do the split on in the
GVA address range. This will cause the split to be made in
all subsequent address space ranges that get created until it
is turned off. To turn this off just echo 0x0 into the same
debugfs node.

Change-Id: I21a3f051c635a90a6bfa8deae53a54db400876f9
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1030303
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-03-25 13:19:17 -07:00
Richard Zhao
907a438315 gpu: nvgpu: vgpu: pass pid when allocate context
Bug 1648908

Change-Id: I39b1becf0b00e930a180a5a8367c22ff4d495446
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1031860
(cherry picked from commit f1940e1438fb3494c3093f1ab6a11bed6deb2b93)
Reviewed-on: http://git-master/r/1022182
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-03-24 14:25:18 -07:00
Aingara Paramakuru
845a693d13 gpu: nvgpu: vgpu: add channel timeslice support
Update vgpu back-end to send channel timeslice request
to server.

JIRA VFND-1347
Bug 1729664

Change-Id: I289f88882780616331952a79a223755117f07174
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1028977
(cherry picked from commit 792a5642b37ca34362ba68200cb8909d2fe8c18c)
Reviewed-on: http://git-master/r/1026592
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-03-24 09:00:15 -07:00
Aingara Paramakuru
7d45a7361d gpu: nvgpu: vgpu: add channel interleave support
Update vgpu back-end to send channel interleave request
to server.

JIRA VFND-1313
Bug 1729664

Change-Id: I2433aef485135ae9222dec238e25aedc19257744
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1028976
(cherry picked from commit df3c5dc410839d126cc0574064d23e58102689b8)
Reviewed-on: http://git-master/r/1026049
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-03-23 11:04:19 -07:00
Yogish Kulkarni
6e946ad3a3 gpu: nvgpu: use gk20a_free_sgtable to free sgtable
Use gk20a_free_sgtable to free sgtable

Bug 200130473

Change-Id: I6ddffb848a289ce81804502b7628feb5a4a8d000
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
Reviewed-on: http://git-master/r/785884
(cherry picked from commit a4f3b53f2ed3971d9b8945f5bc9c1b2822156a89)
Reviewed-on: http://git-master/r/833646
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-03-23 07:51:59 -07:00
Seshendra Gadagottu
2e0770fecc gpu: nvgpu: create generic name for sysfs module
Make gpu sysfs name same across different chips.
If gpu device name is different from "gpu.0", then
create symlink with generic name under same parent.

Generic gpu syfs module path: /sys/devices/gpu.0

Bug 200161014

Change-Id: I9a7d5971c069d5a33f8e5c811d4578231f710878
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/840742
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-03-23 07:50:29 -07:00