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Author SHA1 Message Date
Vedashree Vidwans
2386ddd038 gpu: nvgpu: modify pbdma.get_fc_target 
Modify pbdma.get_fc_target() to accept nvgpu_device pointer. This is
required for nvgpu-next.

JIRA NVGPU-6135

Change-Id: I8baa58c704ee32ee68e87915029ac2be2132d4a4
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2440180
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 2020-12-15 14:13:48 -06:00
srajum
6aec282dc1 Revert "gpu: nvgpu: Fix for unit test failures" 
This reverts commit 0e353e0022da6064a2c0f71ed43a2a76ceec1a97.

- created unit test change to exercise change with "23293fef"
  but there was issues with that change and now made correponding 
  driver change and no longer this unit test change required.

JIRA NVGPU-6051

Change-Id: Id8131ad027069062435947d79d627b23470a7199
Signed-off-by: srajum <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2415023
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Seeta Rama Raju
1bd0261cbe gpu: nvgpu: Fix for unit test failures 
JIRA NVGPU-6051

Change-Id: Ic061594096ef49f7984cde4405f4934ded220e91
Signed-off-by: Seeta Rama Raju <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2411562
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 2020-12-15 14:13:28 -06:00
Konsta Hölttä
dfd9feace6 gpu: nvgpu: recover pbdma errors before ack 
When a pbdma fault needs a channel teardown, do the recovery/teardown
process before acking the pbdma interrupt status back. Acking it causes
the hardware to proceed which could release fences too early before the
involved channel(s) have been found to be broken.

With these host copyengine interrupts, the teardown sequence is light
and proceeds even with the pbdma intr flag still set; there are no
engines to reset when these pbdma launch check interrupts happen. The
bad tsg is just disabled and the channels in it aborted.

A few unit tests are so heavily affected by this refactor that they
would need to be rewritten. They're not strictly needed at the moment,
so do only half of the rewrite: just delete them.

Bug 200611198

Change-Id: Id126fb158b6d05e46ba124cd426389046eedc053
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2392669
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 2020-12-15 14:13:28 -06:00
Alex Waterman
fbb6a5bc1c gpu: nvgpu: Remove fifo->pbdma_map 
The FIFO pbdma map is an array of bit maps that link PBDMAs to runlists.
This array allows other software to query what PBDMA(s) serves a given
runlist. The PBDMA map is read verbatim from an array of host registers.
These registers are stored in a kmalloc()'ed array.

This causes a problem for the device management code. The device
management initialization executes well before the rest of the FIFO
PBDMA initialization occurs. Thus, if the device management code
queries the PBDMA mapping for a given device/runlist, the mapping has
yet to be populated.

In the next patches in this series the engine management code is subsumed
into the device management code. In other words the device struct is
reused by the engine management and all host SW does is pull pointers to
the host managed devices from the device manager. This means that all
engine initialization that used to be done on top of the device
management needs to move to the device code.

So, long story short, the PBDMA map needs to be read from the registers
directly, instead of an array that gets allocated long after the device
code has run.

This patch removes the pbdma map array, deletes two HALs that managed
that, and instead provides a new HAL to query this map directly from
the registers so that the device code can use it.

JIRA NVGPU-5421

Change-Id: I5966d440903faee640e3b41494d2caf4cd177b6d
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2361134
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 2020-12-15 14:13:28 -06:00
Vedashree Vidwans
068e00749b gpu: nvgpu: update config_userd_writeback_enable 
Field value of pbdma_config_userd_writeback_enable is changing from
0x1 to 0x0 for nvgpu-next. So,
- Update config_userd_writeback_enable() hal to accept u32 value.
- Update config_userd_writeback_enable() hal to return modified
  value after setting pbdma_config_userd_writeback_enable field.

Jira NVGPU-5162

Change-Id: I94efa20c34bb867f185778c973bd52b86902b32c
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2330160
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 2020-12-15 14:13:28 -06:00
Thomas Fleury
76295a5aeb gpu: nvgpu: redundant dependency on driver 
Makefile.units.common.tmk already specifies dependency
on nvgpu driver interface.

Remove redundant dependency in units makefiles.

Jira NVGPU-5217

Change-Id: I94cbe707c25f41f0e61915c243fd55fd4bda9ccf
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2322205
(cherry picked from commit d9bdd8f589c121802c74da53945baa677578f71c)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2325907
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 2020-12-15 14:13:28 -06:00
Thomas Fleury
75175d8081 gpu: nvgpu: unit: more traceability for fifo 
Add/fix 'Targets:' statements for:
- nvgpu_engine_status_get_ctx_id_type
- nvgpu_engine_status_get_next_ctx_id_type
- gm20b_pbdma_reset_method
- gm20b_pbdma_restartable_0_intr_descs
- gm20b_pbdma_disable_and_clear_all_intr
- gm20b_pbdma_clear_all_intr
- gm20b_pbdma_get_fc_target
- nvgpu_bug_exit
- nvgpu_bug_cb_from_node

Jira NVGPU-4890

Change-Id: I984542aa7daace85843fe6858d7c27b310046b28
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284481
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 2020-12-15 14:13:28 -06:00
Thomas Fleury
45a6b873d2 gpu: nvgpu: unit: traceability for fifo 
Fix 'Targets:' statements and/or add explicit tests for:
- gops_fifo.fifo_init_support
- gops_fifo.fifo_suspend
- gv11b_tsg_unbind_channel_check_eng_faulted
- nvgpu_tsg_from_ch
- nvgpu_tsg_alloc_sm_error_states_mem
- nvgpu_tsg_cleanup_sw
- nvgpu_tsg_set_error_notifier
- nvgpu_tsg_enable_sched
- nvgpu_tsg_default_timeslice_us
- nvgpu_tsg_get_from_id
- nvgpu_tsg_disable_sched
- nvgpu_tsg_release_common
- nvgpu_tsg_check_and_get_from_id
- nvgpu_tsg_open_common
- gv11b_pbdma_config_userd_writeback_enable
- gv11b_tsg_deinit_eng_method_buffers

Jira NVGPU-4890

Change-Id: I298b9f18318105cee8dc882767e30729e7106ccc
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280134
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 2020-12-15 14:10:29 -06:00
Vedashree Vidwans
652cff2cd0 gpu: nvgpu: unit: fifo: move assert to unit_assert 
unit_assert macro is provided to check a condition and execute bail_out
action given as a second argument.
Currently, in fifo unit, unit_assert() is redefined as assert with
common bail_out action. However, name assert() creates confusion with
linux assert macro. So, this patch removes redefined assert macro and
replaces with unit_assert.

Jira NVGPU-4684

Change-Id: I3a880f965a191f16efdabced5e23723e66ecaf3c
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2276863
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
2540a98aa4 gpu: nvgpu: unit: update 'Targets' for fifo units 
This patch adds a number of missing 'Targets' fields in the SWUTS of
various fifo units, fixes some missing ones and adds gops based
targets.

Jira NVGPU-4376

Change-Id: I445196e7092b01853786f40b860b29abc5d68371
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276680
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
a252ab1b0d gpu: nvgpu: unit: improve gm20b pbdma coverage 
Add the following cases:
- timeout == 0 in gm20b_pbdma_acquire_val
- 32-bit overflow in pbdma_method1_r computation.

Note: 32-bit overflow for pbdma_method0_r in
gm20b_pbdma_is_sw_method_subch is hindered by overflow
in pbdma_method1_r which occurs first.

Jira NVGPU-4673

Change-Id: If8202a4397115efb5af490b1ce974b43699e15c6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276051
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
6828487f70 gpu: nvgpu: unit: coverage for gm20b pbdma status 
Add coverage for the following function:
- gm20b_read_pbdma_status_info

Jira NVGPU-4673

Change-Id: I30c20932f84aac4a96efcb023ca85c5fbaecac1c
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2270924
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 2020-12-15 14:10:29 -06:00
Vedashree Vidwans
0ca906a6ad gpu: nvgpu: unit: fifo: fifo unit test 
This unit test covers most of the nvgpu.common.fifo.fifo module lines
and almost all branches.

Jira NVGPU-3697

Change-Id: I5722277a3e1630a902f63b707eb3de1c4e1876b0
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2237796
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 2020-12-15 14:10:29 -06:00
Nicolas Benech
b682091b13 gpu: nvgpu: SWUTS: clean up test types 
Apply the following changes to test types:
* "Init" --> "Other (setup)"
* "Coverage" --> Removed since it's implied for all tests
* "Feature based" --> "Feature"
* "Boundary Value analysis" and "Boundary values based" --> "Boundary values"
* "Error guessing based" --> "Error guessing"

JIRA NVGPU-3510

Change-Id: I3a9c0c59e6ad806f3479caa5e9a62f4d89f76923
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265670
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
a50802510f gpu: nvgpu: unit: improve coverage for gv11b pbdma HAL 
Improve branch coverage for the following HALs:
- gv11b_pbdma_handle_intr_0 (add error cases for report_pbdma_error)
- gv11b_pbdma_handle_intr_1 (add HCE interrupt case)

Jira NVGPU-3694
Jira NVGPU-4673

Change-Id: I658a7c270af16152ccb6a0b19da1fa8c68e9c2ec
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2263669
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
31d689d489 gpu: nvgpu: unit: improve coverage for gm20b pbdma HAL 
Add unit test for the following HAL:
- gm20b_pbdma_get_ctrl_hce_priv_mode_yes

Jira NVGPU-3694
Jira NVGPU-4673

Change-Id: Ie6c0266753877b5fe7a5c32bf6b971d1ef34d724
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2263651
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
2fe78b4a31 gpu: nvgpu: unit: improve branch coverage for pbdma 
Improve branch coverage for:
- nvgpu_pbdma_find_for_runlist

Jira NVGPU-3490

Change-Id: I28a0b86f92a6912cb4046145c0fcc9ec9efc360f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2263620
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
24210bdbc9 gpu: nvgpu: unit: add tests for gp10b pbdma HAL 
Add unit tests for the following HALs:
- gp10b_pbdma_get_signature
- gp10b_pbdma_get_fc_runlist_timeslice
- gp10b_pbdma_get_config_auth_level_privileged

Jira NVGPU-3694

Change-Id: I672acc76490db358951b31c1231fb8542852dfee
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2253635
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
7b1f5a327f gpu: nvgpu: unit: add tests for gm20b pbdma HAL 
Add tests for the following HALs:
- gm20b_pbdma_acquire_val
- gm20b_pbdma_handle_intr
- gm20b_pbdma_read_data
- gm20b_pbdma_reset_header
- gm20b_pbdma_device_fatal_0_intr_descs
- gm20b_pbdma_restartable_0_intr_descs
- gm20b_pbdma_format_gpfifo_entry
- gm20b_pbdma_get_gp_base
- gm20b_pbdma_get_gp_base_hi
- gm20b_pbdma_get_fc_subdevice
- gm20b_pbdma_get_userd_aperture_mask
- gm20b_pbdma_get_userd_addr
- gm20b_pbdma_get_userd_hi_addr

Jira NVGPU-3694

Change-Id: I3d97f2e70d6c364d673a4f231ff1a3fad349c14e
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2253634
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
ecab3ddbce gpu: nvgpu: unit: add tests for gv11b pbdma HAL 
Add tests for the following HALs:
- gv11b_pbdma_setup_hw
- gv11b_pbdma_intr_enable
- gv11b_pbdma_handle_intr_0
- gv11b_pbdma_handle_intr_1
- gv11b_pbdma_channel_fatal_0_intr_descs
- gv11b_pbdma_get_fc_pb_header
- gv11b_pbdma_get_fc_target
- gv11b_pbdma_set_channel_info_veid
- gv11b_pbdma_config_userd_writeback_enable

Jira NVGPU-3694

Change-Id: Ieea746e07cae4a3c1b5289674d93654edf7de941
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2253633
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
59c740cf6a gpu: nvgpu: fix SWUTS path for common.pbdma 
Fix SWUTS reference for common.pbdma.
Fix #ifdef for include file.

Jira NVGPU-3490

Change-Id: I115b3cd8efd14ee6f50efd725c244c80cb8c2bea
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2253632
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
0ba37ecf4d gpu: nvgpu: unit: enable pbdma tests on target 
Add missing pbdma, runlist and channel files to tmake
makefile and fix compilation issues.
Update exports to fix link issues.
Update required tests in JSON file.

Jira NVGPU-3490

Change-Id: Ib5f7dd15ebbd81c5f5f304f8c22ea8299c469a93
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2247248
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
8ca378e1c0 gpu: nvgpu: add unit tests for pbdma_status 
Add unit tests for:
- nvgpu_pbdma_status_is_chsw_switch
- nvgpu_pbdma_status_is_chsw_load
- nvgpu_pbdma_status_is_chsw_save
- nvgpu_pbdma_status_is_chsw_valid
- nvgpu_pbdma_status_is_id_type_tsg
- nvgpu_pbdma_status_is_next_id_type_tsg

Jira NVGPU-3490

Change-Id: Iaf032b7a39483d1378945b269f16be8349dd6d7b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241818
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
162b93f435 gpu: nvgpu: add unit tests for common.pbdma 
Add unit tests for:
- nvgpu_pbdma_setup_sw
- nvgpu_pbdma_cleanup_sw
- nvgpu_pbdma_find_for_runlist
- nvgpu_pbdma_init_intr_descs

Jira NVGPU-3490

Change-Id: Ia92a1c2213a03cb0e62ea59f8b29bf3fc606c33d
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241799
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00