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c6e021589e
Changes between GV100 and Turing VFE pstate tables- 1. PS3.5 ucode packs two sets of vfe boardobjgrp - primary and rppm in new struct whose name is appended with suffix pack. The rppm (runtime power and performance model) set is needed to achieve Max Q. The rppm set is not relevant to Automotive SKUs and entries are set to 'disabled'. But the turing ucode in R400 uses the 'pack' struct to calculate supersurface offset and size of vfe_var/equ boardobjgrp. 2. Header size has been increased to add RPPM related VFE variable and equation count. VFE Variables boardobjgrp specific changes- 1. New var type 'single caller specified' had been added to represent generic type of variable which is not associated with voltage or frequency but identified by a Unique ID. 2. The frequency variable type can be associated with a clock domain, if the clock domain index availability flag is set. VFE Equations boardobjgrp specific changes- 1. New entry type 'scalar' had been added to allow scaling equation pointed by 'equ_idx_to_scale'. 2. More ouput types are added to represent the equation evaluation results. We modify the nvgpu Turing driver and GV100 ucode to adapt to these changes. This patch also fixes some MISRA defects in touched files. JIRA NVGPU-1178 Change-Id: I90910ac8dccf0b98a588cbc442dc11ac4fbd2e61 Signed-off-by: tkudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1928999 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vaikundanathan S <vaikuns@nvidia.com> Tested-by: Vaikundanathan S <vaikuns@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
118 lines
3.4 KiB
C
118 lines
3.4 KiB
C
/*
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_PERF_VFE_VAR_H
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#define NVGPU_PERF_VFE_VAR_H
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#include <nvgpu/boardobjgrp.h>
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#include <nvgpu/boardobjgrp_e32.h>
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#include <nvgpu/boardobjgrp_e255.h>
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#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
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int vfe_var_sw_setup(struct gk20a *g);
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int vfe_var_pmu_setup(struct gk20a *g);
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#define VFE_VAR_GET(_pperf, _idx) \
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((struct vfe_var)BOARDOBJGRP_OBJ_GET_BY_IDX( \
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&((_pperf)->vfe.vars.super.super), (_idx)))
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#define VFE_VAR_IDX_IS_VALID(_pperf, _idx) \
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boardobjgrp_idxisvalid(&((_pperf)->vfe.vars.super.super), (_idx))
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struct vfe_var {
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struct boardobj super;
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u32 out_range_min;
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u32 out_range_max;
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struct boardobjgrpmask_e32 mask_dependent_vars;
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struct boardobjgrpmask_e255 mask_dependent_equs;
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bool b_is_dynamic_valid;
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bool b_is_dynamic;
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};
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struct vfe_vars {
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struct boardobjgrp_e32 super;
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u8 polling_periodms;
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};
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struct vfe_var_derived {
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struct vfe_var super;
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};
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struct vfe_var_derived_product {
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struct vfe_var_derived super;
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u8 var_idx0;
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u8 var_idx1;
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};
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struct vfe_var_derived_sum {
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struct vfe_var_derived super;
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u8 var_idx0;
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u8 var_idx1;
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};
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struct vfe_var_single {
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struct vfe_var super;
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u8 override_type;
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u32 override_value;
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};
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struct vfe_var_single_frequency {
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struct vfe_var_single super;
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u8 clk_domain_idx;
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};
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struct vfe_var_single_voltage {
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struct vfe_var_single super;
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};
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struct vfe_var_single_caller_specified {
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struct vfe_var_single super;
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u8 uid;
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};
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struct vfe_var_single_sensed {
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struct vfe_var_single super;
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};
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struct vfe_var_single_sensed_fuse {
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struct vfe_var_single_sensed super;
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struct ctrl_perf_vfe_var_single_sensed_fuse_override_info override_info;
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struct ctrl_perf_vfe_var_single_sensed_fuse_vfield_info vfield_info;
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struct ctrl_perf_vfe_var_single_sensed_fuse_ver_vfield_info vfield_ver_info;
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struct ctrl_perf_vfe_var_single_sensed_fuse_value fuse_val_default;
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bool b_fuse_value_signed;
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u32 fuse_value_integer;
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u32 fuse_value_hw_integer;
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u8 fuse_version;
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bool b_version_check_done;
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};
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struct vfe_var_single_sensed_temp {
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struct vfe_var_single_sensed super;
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u8 therm_channel_index;
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int temp_hysteresis_positive;
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int temp_hysteresis_negative;
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int temp_default;
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};
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#endif /* NVGPU_PERF_VFE_VAR_H */
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