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e53d24d6d2
ifdef function prototypes with CONFIG_* defines. This fixes MISRA rule 8.6 violations which complain about undefined functions. Also moved nvgpu_channel_get_from_file prototype to ioctl_channel.h & nvgpu_probe to driver_common.h as those are linux specific. Define nvgpu_init_soc_vars in posix/soc.c as it is implemented in QNX. JIRA NVGPU-3873 Change-Id: I5d2b238e1b5d1318867cd2416ac5f03cc6ab7c6a Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2196794 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
60 lines
2.3 KiB
C
60 lines
2.3 KiB
C
/*
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* GM20B FB
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*
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* Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_FB_GM20B
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#define NVGPU_FB_GM20B
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#include <nvgpu/types.h>
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struct gk20a;
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struct nvgpu_mem;
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void gm20b_fb_init_hw(struct gk20a *g);
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int gm20b_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb);
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#ifdef CONFIG_NVGPU_HAL_NON_FUSA
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void fb_gm20b_init_fs_state(struct gk20a *g);
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void gm20b_fb_set_mmu_page_size(struct gk20a *g);
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#endif
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u32 gm20b_fb_mmu_ctrl(struct gk20a *g);
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u32 gm20b_fb_mmu_debug_ctrl(struct gk20a *g);
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u32 gm20b_fb_mmu_debug_wr(struct gk20a *g);
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u32 gm20b_fb_mmu_debug_rd(struct gk20a *g);
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#ifdef CONFIG_NVGPU_COMPRESSION
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bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g);
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u64 gm20b_fb_compression_page_size(struct gk20a *g);
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unsigned int gm20b_fb_compressible_page_size(struct gk20a *g);
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u64 gm20b_fb_compression_align_mask(struct gk20a *g);
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#endif
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void gm20b_fb_dump_vpr_info(struct gk20a *g);
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void gm20b_fb_dump_wpr_info(struct gk20a *g);
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void gm20b_fb_read_wpr_info(struct gk20a *g, u64 *wpr_base, u64 *wpr_size);
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int gm20b_fb_vpr_info_fetch(struct gk20a *g);
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#ifdef CONFIG_NVGPU_DEBUGGER
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bool gm20b_fb_debug_mode_enabled(struct gk20a *g);
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void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable);
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void gm20b_fb_set_mmu_debug_mode(struct gk20a *g, bool enable);
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#endif
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#endif
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