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e7d706ccaf
-Added method nvgpu_tu104_acr_ahesasc_sw_init() to set ACR-AHESASC properties. -Added method nvgpu_tu104_acr_asb_sw_init() to set ACR-ASB properties. -Modified method nvgpu_tu104_acr_sw_init() to call ACR AHESASC/ASB init & set bootstrap_owner to LSF_FALCON_ID_GSPLITE by removing older support of default ACR executing on SEC2. -Added method tu104_bootstrap_hs_acr to execute ACR AHESASC & ASB ucode. -Execute ACR-AHESASC(ACR hub encryption setter and signature checker) on SEC2 falcon to copy ucode blob from non-wpr to wpr & lockdown wpr then perform signature verification of LS falcon ucode whitout doing any LS flacon bootstrap. -Once first stage of ACR is successful then execute ACR-ASB(ACR SEC2 booter) on GSP falcon to bootstrap SEC2-RTOS on sec2 falcon to perform PMU & GR falcons bootstrap. -Enable SEC2 RTOS support by setting NVGPU_SUPPORT_SEC2_RTOS to true -Added tu104 ACR remove support to clear allocated space JIRA NVGPUT-134 Change-Id: I2d1777af83feda5e8f6845876177cce062c43ace Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1918937 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>