Debarshi Dutta 1ec4661510 gpu: nvgpu: add corresponding whitelists for per-context registers. ...

For gp10b, there is a single whitelist maintained for both global and
per-context registers, for gm20b, there are separate whitelists
maintained for global and per-context registers. This patch updates
the failing registers in the bug into the per-context list.

Bug 200363092

Change-Id: I1906ea46d4b37f9aa8d13833a5bba4a5f7c6bbe5
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1603660
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2018-03-13 08:33:46 -07:00

..

acr_gm20b.c

nvgpu: gpu: pmu: Use pmu ops to call pmu_reset().

2017-02-23 21:33:33 -08:00

acr_gm20b.h

gpu: nvgpu: ACR interface headers reorganization

2017-02-23 01:04:48 -08:00

cde_gm20b.c

gpu: nvgpu: Prepare for per-GPU CDE program numbers

2015-08-19 08:03:24 -07:00

cde_gm20b.h

gpu: nvgpu: Prepare for per-GPU CDE program numbers

2015-08-19 08:03:24 -07:00

ce2_gm20b.c

gpu: nvgpu: disable ce2 interrupts when unhandled

2015-04-04 18:08:17 -07:00

ce2_gm20b.h

gpu: nvgpu: disable ce2 interrupts when unhandled

2015-04-04 18:08:17 -07:00

clk_gm20b.c

gpu: nvgpu: pass gk20a struct to gk20a_busy

2017-03-27 12:06:06 -07:00

clk_gm20b.h

gpu: nvgpu: use common nvgpu mutex/spinlock APIs

2017-02-22 04:15:02 -08:00

debug_gm20b.c

gpu: nvgpu: move debug dump to HAL

2015-04-04 15:06:07 -07:00

debug_gm20b.h

gpu: nvgpu: move debug dump to HAL

2015-04-04 15:06:07 -07:00

fb_gm20b.c

gpu: nvgpu: Move gm20b HW headers

2017-01-11 12:44:14 -08:00

fb_gm20b.h

gpu: nvgpu: Export gm20b kind functions

2015-03-18 12:12:22 -07:00

fifo_gm20b.c

gpu: nvgpu: debug dump enablement for t19x

2017-03-09 12:23:29 -08:00

fifo_gm20b.h

video: tegra: host: add gm20b channel op

2015-03-18 12:09:39 -07:00

gm20b_gating_reglist.c

gpu: nvgpu: gm20b: update slcg prod values

2015-09-01 07:58:05 -07:00

gm20b_gating_reglist.h

gpu: nvgpu: gm20b: update clock gating defines

2015-04-04 18:04:32 -07:00

gr_ctx_gm20b.c

gpu: nvgpu: update get_netlist_name ops declaration

2016-06-21 15:20:49 -07:00

gr_ctx_gm20b.h

gpu: nvgpu: gm20b: select NETB for final NETLIST

2015-03-18 12:10:39 -07:00

gr_gm20b.c

gpu: nvgpu: Disable rd_coalesce for all chips

2017-09-06 05:29:39 -07:00

gr_gm20b.h

gpu: nvgpu: Implement SET_RD_COALESCE

2017-01-05 09:13:30 -08:00

hal_gm20b.c

gpu: nvgpu: hal for timestamps correlation

2017-05-23 14:14:46 -07:00

hal_gm20b.h

gpu: nvgpu: Add class numbers to characteristics

2015-03-18 12:12:06 -07:00

ltc_gm20b.c

gpu: nvgpu: use common nvgpu mutex/spinlock APIs

2017-02-22 04:15:02 -08:00

ltc_gm20b.h

gpu: nvgpu: Set compression page per SoC

2015-04-04 18:04:45 -07:00

mc_gm20b.c

gpu: nvgpu: refactor interrupt handling

2017-03-20 06:42:07 -07:00

mc_gm20b.h

gpu: nvgpu: Per-chip interrupt processing

2015-03-18 12:11:56 -07:00

mm_gm20b.c

gpu: nvgpu: Use timer API in gm20b code

2017-01-18 16:46:38 -08:00

mm_gm20b.h

nvgpu: Host side changes to support HS mode

2015-03-18 12:10:14 -07:00

pmu_gm20b.c

drivers: gpu: nvgpu: Use soc/tegra/fuse.h for fuse header

2017-01-19 00:04:59 -08:00

pmu_gm20b.h

gpu: nvgpu: update HAL of ACR BL

2016-06-01 11:24:12 -07:00

regops_gm20b.c

gpu: nvgpu: add corresponding whitelists for per-context registers.

2018-03-13 08:33:46 -07:00

regops_gm20b.h

gpu: nvgpu: gm20b: correct hdr #define

2015-05-18 11:19:31 +05:30

therm_gm20b.c

gpu: nvgpu: Move gm20b HW headers

2017-01-11 12:44:14 -08:00

therm_gm20b.h

gpu: nvgpu: update thermal programming

2015-10-27 15:42:08 -07:00