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012f46ef74
Move ivc comm related functions to ivc/comm_vgpu.c. These functions call os specific ivc counterparts. Jira GVSCI-334 Change-Id: I886dddb71c43975cb83a3508005ab1136b7adadc Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2082183 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
64 lines
2.0 KiB
C
64 lines
2.0 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/types.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/string.h>
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#include <nvgpu/vgpu/vgpu_ivc.h>
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#include <nvgpu/vgpu/tegra_vgpu.h>
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#include "comm_vgpu.h"
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int vgpu_comm_init(struct gk20a *g)
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{
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size_t queue_sizes[] = { TEGRA_VGPU_QUEUE_SIZES };
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return vgpu_ivc_init(g, 3, queue_sizes, TEGRA_VGPU_QUEUE_CMD,
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ARRAY_SIZE(queue_sizes));
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}
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void vgpu_comm_deinit(void)
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{
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size_t queue_sizes[] = { TEGRA_VGPU_QUEUE_SIZES };
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vgpu_ivc_deinit(TEGRA_VGPU_QUEUE_CMD, ARRAY_SIZE(queue_sizes));
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}
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int vgpu_comm_sendrecv(struct tegra_vgpu_cmd_msg *msg, size_t size_in,
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size_t size_out)
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{
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void *handle;
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size_t size = size_in;
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void *data = msg;
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int err;
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err = vgpu_ivc_sendrecv(vgpu_ivc_get_server_vmid(),
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TEGRA_VGPU_QUEUE_CMD, &handle, &data, &size);
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if (err == 0) {
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WARN_ON(size < size_out);
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nvgpu_memcpy((u8 *)msg, (u8 *)data, size_out);
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vgpu_ivc_release(handle);
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}
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return err;
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}
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